Searched refs:createInputPort (Results 1 - 25 of 39) sorted by relevance
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| /gem5/ext/dsent/model/electrical/ |
| H A D | RippleAdder.cc | 61 createInputPort("CI");
65 createInputPort("A" + String(i));
66 createInputPort("B" + String(i));
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| H A D | DFFRAM.cc | 82 createInputPort("In", makeNetIndex(0, number_bits-1));
85 createInputPort("WRAddr" + (String)i);
86 createInputPort("RDAddr" + (String)i);
88 createInputPort("WE");
89 createInputPort("CK");
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| H A D | BarrelShifter.cc | 89 createInputPort( "In", makeNetIndex(0, number_bits-1));
96 createInputPort( "Shift" + (String) i);
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| H A D | MultiplexerCrossbar.cc | 87 createInputPort("In" + (String)i, makeNetIndex(0, number_bits-1));
94 createInputPort(String::format("Sel%d_%d", i, j));
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| H A D | MuxTreeSerializer.cc | 94 createInputPort("In", makeNetIndex(0, in_bits-1));
95 createInputPort("OutCK");
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| H A D | DemuxTreeDeserializer.cc | 96 createInputPort("In", makeNetIndex(0, input_bits-1));
97 createInputPort("InCK");
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| H A D | Multiplexer.cc | 80 createInputPort( "In" + (String) i, makeNetIndex(0, number_bits-1));
84 createInputPort( "Sel" + (String)i);
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| /gem5/ext/dsent/model/electrical/router/ |
| H A D | RouterSwitchAllocator.cc | 87 createInputPort("CK");
92 createInputPort(String::format("Stage1Arb%d->Request%d", i, j));
93 createInputPort(String::format("Stage1Arb%d->Grant%d", i, j));
100 createInputPort(String::format("Stage2Arb%d->Request%d", i, j));
101 createInputPort(String::format("Stage2Arb%d->Grant%d", i, j));
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| H A D | RouterInputPort.cc | 116 createInputPort("CK");
117 createInputPort("FlitIn", makeNetIndex(0, number_bits_per_flit-1));
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| /gem5/ext/dsent/model/std_cells/ |
| H A D | AND2.cc | 59 createInputPort("A");
60 createInputPort("B");
214 createInputPort("A");
215 createInputPort("B");
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| H A D | NAND2.cc | 60 createInputPort("A");
61 createInputPort("B");
210 createInputPort("A");
211 createInputPort("B");
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| H A D | NOR2.cc | 60 createInputPort("A");
61 createInputPort("B");
209 createInputPort("A");
210 createInputPort("B");
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| H A D | MUX2.cc | 60 createInputPort("A");
61 createInputPort("B");
62 createInputPort("S0");
247 createInputPort("A");
248 createInputPort("B");
249 createInputPort("S0");
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| H A D | BUF.cc | 56 createInputPort("A");
166 createInputPort("A");
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| H A D | INV.cc | 61 createInputPort("A");
180 createInputPort("A");
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| H A D | OR2.cc | 56 createInputPort("A");
57 createInputPort("B");
209 createInputPort("A");
210 createInputPort("B");
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| H A D | XOR2.cc | 60 createInputPort("A");
61 createInputPort("B");
228 createInputPort("A");
229 createInputPort("B");
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| H A D | LATQ.cc | 61 createInputPort("D");
62 createInputPort("G");
239 createInputPort("D");
240 createInputPort("G");
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| H A D | DFFQ.cc | 61 createInputPort("D");
62 createInputPort("CK");
284 createInputPort("D");
285 createInputPort("CK");
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| /gem5/ext/dsent/model/timing_graph/ |
| H A D | ElectricalTimingOptimizer.cc | 75 createInputPort(port_name, port_info->getNetIndex());
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| /gem5/ext/dsent/model/optical/ |
| H A D | ThrottledLaserSource.cc | 70 createInputPort( "LaserEnable");
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| H A D | OpticalLinkBackendRx.cc | 90 createInputPort("In", makeNetIndex(0, in_bits-1));
91 createInputPort("LinkCK");
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| H A D | OpticalLinkBackendTx.cc | 87 createInputPort("In", makeNetIndex(0, in_bits-1));
88 createInputPort("LinkCK");
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| H A D | SWMRLink.cc | 77 createInputPort("CK");
78 createInputPort("In", makeNetIndex(0, number_wavelengths-1));
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| H A D | SWSRLink.cc | 87 createInputPort("LinkCK");
88 createInputPort("In", makeNetIndex(0, number_bits-1));
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Completed in 44 milliseconds
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