Searched refs:context (Results 1 - 25 of 43) sorted by relevance

12

/gem5/src/arch/mips/
H A Dremote_gdb.cc168 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
172 RemoteGDB::MipsGdbRegCache::getRegs(ThreadContext *context) argument
176 for (int i = 0; i < 32; i++) r.gpr[i] = context->readIntReg(i);
177 r.sr = context->readMiscRegNoEffect(MISCREG_STATUS);
178 r.lo = context->readIntReg(INTREG_LO);
179 r.hi = context->readIntReg(INTREG_HI);
180 r.badvaddr = context->readMiscRegNoEffect(MISCREG_BADVADDR);
181 r.cause = context->readMiscRegNoEffect(MISCREG_CAUSE);
182 r.pc = context->pcState().pc();
183 for (int i = 0; i < 32; i++) r.fpr[i] = context
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/gem5/src/arch/x86/
H A Dremote_gdb.cc76 context()->getDTBPtr())->getWalker();
78 Fault fault = walker->startFunctional(context(), va, logBytes,
87 fault = walker->startFunctional(context(), endVa, logBytes,
91 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
98 HandyM5Reg m5reg = context()->readMiscRegNoEffect(MISCREG_M5_REG);
108 RemoteGDB::AMD64GdbRegCache::getRegs(ThreadContext *context) argument
111 r.rax = context->readIntReg(INTREG_RAX);
112 r.rbx = context->readIntReg(INTREG_RBX);
113 r.rcx = context->readIntReg(INTREG_RCX);
114 r.rdx = context
138 getRegs(ThreadContext *context) argument
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/gem5/src/arch/arm/
H A Dremote_gdb.cc186 if (!virtvalid(context(), gen.addr())) {
197 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
202 RemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext *context) argument
207 r.x[i] = context->readIntReg(INTREG_X0 + i);
208 r.spx = context->readIntReg(INTREG_SPX);
209 r.pc = context->pcState().pc();
210 r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR);
214 auto v = (context->readVecReg(RegId(VecRegClass, i))).as<VecElem>();
220 r.fpsr = context->readMiscRegNoEffect(MISCREG_FPSR);
221 r.fpcr = context
254 getRegs(ThreadContext *context) argument
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/gem5/src/mem/ruby/slicc_interface/
H A DAbstractCacheEntry.cc56 AbstractCacheEntry::setLocked(int context) argument
58 DPRINTF(RubyCache, "Setting Lock for addr: %#x to %d\n", m_Address, context);
59 m_locked = context;
70 AbstractCacheEntry::isLocked(int context) const
73 m_Address, m_locked, context);
74 return m_locked == context;
H A DAbstractCacheEntry.hh67 void setLocked(int context);
69 bool isLocked(int context) const;
/gem5/src/arch/power/
H A Dremote_gdb.cc171 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
175 RemoteGDB::PowerGdbRegCache::getRegs(ThreadContext *context) argument
184 r.gpr[i] = htobe((uint32_t)context->readIntReg(i));
187 r.fpr[i] = context->readFloatReg(i);
189 r.pc = htobe((uint32_t)context->pcState().pc());
191 r.cr = htobe((uint32_t)context->readIntReg(INTREG_CR));
192 r.lr = htobe((uint32_t)context->readIntReg(INTREG_LR));
193 r.ctr = htobe((uint32_t)context->readIntReg(INTREG_CTR));
194 r.xer = htobe((uint32_t)context->readIntReg(INTREG_XER));
198 RemoteGDB::PowerGdbRegCache::setRegs(ThreadContext *context) cons
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/gem5/src/arch/riscv/
H A Dremote_gdb.cc160 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
164 RemoteGDB::RiscvGdbRegCache::getRegs(ThreadContext *context) argument
168 r.gpr[i] = context->readIntReg(i);
169 r.pc = context->pcState().pc();
173 RemoteGDB::RiscvGdbRegCache::setRegs(ThreadContext *context) const
177 context->setIntReg(i, r.gpr[i]);
178 context->pcState(r.pc);
/gem5/src/arch/sparc/
H A Dremote_gdb.cc170 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
175 RemoteGDB::SPARCGdbRegCache::getRegs(ThreadContext *context) argument
178 for (int i = 0; i < 32; i++) r.gpr[i] = htobe((uint32_t)context->readIntReg(i));
179 PCState pc = context->pcState();
182 r.y = htobe((uint32_t)context->readIntReg(NumIntArchRegs + 1));
183 PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
185 r.fsr = htobe((uint32_t)context->readMiscReg(MISCREG_FSR));
186 r.csr = htobe((uint32_t)context->readIntReg(NumIntArchRegs + 2));
190 RemoteGDB::SPARC64GdbRegCache::getRegs(ThreadContext *context) argument
193 for (int i = 0; i < 32; i++) r.gpr[i] = htobe(context
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H A Dtlb.cc400 TLB::writeTagAccess(Addr va, int context)
403 va, context, mbits(va, 63,13) | mbits(context,12,0));
405 tag_access = mbits(va, 63,13) | mbits(context,12,0);
454 int context;
465 context = 0;
469 context = pri_context;
497 context = 0;
499 e = lookup(vaddr, part_id, false, context);
503 writeTagAccess(vaddr, context);
615 int context = 0; local
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/gem5/src/cpu/
H A Dtiming_expr.cc59 uint64_t TimingExprSrcReg::eval(TimingExprEvalContext &context) argument
61 return context.inst->srcRegIdx(index).index();
64 uint64_t TimingExprReadIntReg::eval(TimingExprEvalContext &context) argument
66 return context.thread->readIntReg(reg->eval(context));
69 uint64_t TimingExprLet::eval(TimingExprEvalContext &context) argument
71 TimingExprEvalContext new_context(context.inst,
72 context.thread, this);
77 uint64_t TimingExprRef::eval(TimingExprEvalContext &context) argument
81 if (!context
89 eval(TimingExprEvalContext &context) argument
124 eval(TimingExprEvalContext &context) argument
193 eval(TimingExprEvalContext &context) argument
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H A Dtiming_expr.hh71 /** Object to gather the visible context for evaluation */
75 /** Special visible context */
97 virtual uint64_t eval(TimingExprEvalContext &context) = 0;
110 uint64_t eval(TimingExprEvalContext &context) { return value; } argument
123 uint64_t eval(TimingExprEvalContext &context);
136 uint64_t eval(TimingExprEvalContext &context);
151 uint64_t eval(TimingExprEvalContext &context);
164 uint64_t eval(TimingExprEvalContext &context);
179 uint64_t eval(TimingExprEvalContext &context);
196 uint64_t eval(TimingExprEvalContext &context);
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/gem5/util/
H A Dhgfilesize.py1 from mercurial import context
21 existing_tip = context.changectx(repo, node).rev()
22 new_tip = context.changectx(repo, 'tip').rev()
24 ctx = context.changectx(repo, rev)
/gem5/src/arch/alpha/
H A Dremote_gdb.cc192 Addr ptbr = context()->readMiscRegNoEffect(IPR_PALtemp20);
194 kernel_pte_lookup(context()->getPhysProxy(), ptbr, va);
207 RemoteGDB::AlphaGdbRegCache::getRegs(ThreadContext *context) argument
211 r.pc = context->pcState().pc();
215 r.gpr[i] = context->readIntReg(reg_redir[i]);
218 r.gpr[i] = context->readIntReg(i);
223 r.fpr[i] = context->readFloatReg(i);
230 RemoteGDB::AlphaGdbRegCache::setRegs(ThreadContext *context) const
236 context->setIntReg(reg_redir[i], r.gpr[i]);
240 context
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H A Dremote_gdb.hh78 RemoteGDB(System *system, ThreadContext *context, int _port);
/gem5/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test02/
H A Dtest02.cpp47 void sync(int context) argument
49 for ( int i = 0; i < context; i++ )
53 cout << sc_time_stamp() << ": sync(" << context << ") terminating"<< endl;
/gem5/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test05/
H A Dtest05.cpp60 void sync(int context) argument
62 for ( int i = 0; i < context; i++ )
66 cout << sc_time_stamp() << ": sync(" << context << ") terminating" << endl;
/gem5/util/style/
H A Drepo.py99 def staged_regions(self, fname, context=0):
107 def modified_regions(self, fname, context=0):
138 def staged_regions(self, fname, context=0):
145 return modified_regions(old, new, context=context)
147 def modified_regions(self, fname, context=0):
154 return modified_regions(old, new, context=context)
228 def staged_regions(self, fname, context=0):
229 return self.modified_regions(fname, context
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H A Dsort_includes.py100 def matcher(context, line):
114 def matcher(context, line):
115 (keyword, fname, extra) = base_matcher(context, line)
135 def matcher(context, line):
136 m = rex.match(context["filename"])
140 (keyword, fname, extra) = base_matcher(context, line)
225 context = {
235 keyword, include, extra = matcher(context, line)
H A Dstyle.py147 def modified_regions(old, new, context=0):
150 for group in m.get_grouped_opcodes(context):
/gem5/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/
H A Dtest01.cpp54 void sync(int context) argument
56 for ( int i = 0; i < context; i++ )
60 cout << sc_time_stamp() << ": sync(" << context << ") terminating" << endl;
/gem5/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test04/
H A Dtest04.cpp62 void sync(int context) argument
64 for ( int i = 0; i < context; i++ )
68 cout << sc_time_stamp() << ": sync(" << context << ") terminating" << endl;
/gem5/src/mem/cache/prefetch/
H A Dstride.hh156 * Try to find a table of entries for the given context. If none is
159 * @param context The context to be searched for.
160 * @return The table corresponding to the given context.
162 PCTable* findTable(int context);
165 * Create a PC table for the given context.
167 * @param context The context of the new PC table.
170 PCTable* allocateNewContext(int context);
H A Dstride.cc94 StridePrefetcher::findTable(int context) argument
96 // Check if table for given context exists
97 auto it = pcTables.find(context);
102 return allocateNewContext(context);
106 StridePrefetcher::allocateNewContext(int context) argument
109 auto insertion_result = pcTables.insert(std::make_pair(context,
112 DPRINTF(HWPrefetch, "Adding context %i with stride entries\n", context);
/gem5/tests/test-progs/gpu-hello/src/
H A Dgpu-hello.cpp54 cl_context context; variable
140 // 2. create context from platform
143 context = clCreateContextFromType(cps, CL_DEVICE_TYPE_GPU, NULL, NULL,
152 status = clGetContextInfo(context, CL_CONTEXT_DEVICES, 0, NULL,
165 status = clGetContextInfo(context, CL_CONTEXT_DEVICES, deviceListSize,
173 commandQueue = clCreateCommandQueue(context, devices[0], 0, &status);
184 program = clCreateProgramWithSource(context, 1, &source, sourceSize,
307 status = clReleaseContext(context);
/gem5/src/dev/arm/
H A Dsmmu_v3_transl.cc262 if (!configCacheLookup(yield, context)) {
263 if(findConfig(yield, context, tr)) {
264 configCacheUpdate(yield, context);
279 if (context.stage1Enable) {
281 } else if (context.stage2Enable) {
287 if (context.stage1Enable || context.stage2Enable)
384 smmu.tlb.lookup(request.addr, context.asid, context.vmid);
389 request.addr, context
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