Lines Matching refs:context

186             if (!virtvalid(context(), gen.addr())) {
197 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
202 RemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext *context)
207 r.x[i] = context->readIntReg(INTREG_X0 + i);
208 r.spx = context->readIntReg(INTREG_SPX);
209 r.pc = context->pcState().pc();
210 r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR);
214 auto v = (context->readVecReg(RegId(VecRegClass, i))).as<VecElem>();
220 r.fpsr = context->readMiscRegNoEffect(MISCREG_FPSR);
221 r.fpcr = context->readMiscRegNoEffect(MISCREG_FPCR);
225 RemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext *context) const
230 context->setIntReg(INTREG_X0 + i, r.x[i]);
231 auto pc_state = context->pcState();
233 context->pcState(pc_state);
234 context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr);
238 context->setIntReg(INTREG_SPX, r.spx);
242 auto v = (context->getWritableVecReg(
249 context->setMiscRegNoEffect(MISCREG_FPSR, r.fpsr);
250 context->setMiscRegNoEffect(MISCREG_FPCR, r.fpcr);
254 RemoteGDB::AArch32GdbRegCache::getRegs(ThreadContext *context)
258 r.gpr[0] = context->readIntReg(INTREG_R0);
259 r.gpr[1] = context->readIntReg(INTREG_R1);
260 r.gpr[2] = context->readIntReg(INTREG_R2);
261 r.gpr[3] = context->readIntReg(INTREG_R3);
262 r.gpr[4] = context->readIntReg(INTREG_R4);
263 r.gpr[5] = context->readIntReg(INTREG_R5);
264 r.gpr[6] = context->readIntReg(INTREG_R6);
265 r.gpr[7] = context->readIntReg(INTREG_R7);
266 r.gpr[8] = context->readIntReg(INTREG_R8);
267 r.gpr[9] = context->readIntReg(INTREG_R9);
268 r.gpr[10] = context->readIntReg(INTREG_R10);
269 r.gpr[11] = context->readIntReg(INTREG_R11);
270 r.gpr[12] = context->readIntReg(INTREG_R12);
271 r.gpr[13] = context->readIntReg(INTREG_SP);
272 r.gpr[14] = context->readIntReg(INTREG_LR);
273 r.gpr[15] = context->pcState().pc();
274 r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR);
280 r.fpscr = context->readMiscRegNoEffect(MISCREG_FPSCR);
284 RemoteGDB::AArch32GdbRegCache::setRegs(ThreadContext *context) const
288 context->setIntReg(INTREG_R0, r.gpr[0]);
289 context->setIntReg(INTREG_R1, r.gpr[1]);
290 context->setIntReg(INTREG_R2, r.gpr[2]);
291 context->setIntReg(INTREG_R3, r.gpr[3]);
292 context->setIntReg(INTREG_R4, r.gpr[4]);
293 context->setIntReg(INTREG_R5, r.gpr[5]);
294 context->setIntReg(INTREG_R6, r.gpr[6]);
295 context->setIntReg(INTREG_R7, r.gpr[7]);
296 context->setIntReg(INTREG_R8, r.gpr[8]);
297 context->setIntReg(INTREG_R9, r.gpr[9]);
298 context->setIntReg(INTREG_R10, r.gpr[10]);
299 context->setIntReg(INTREG_R11, r.gpr[11]);
300 context->setIntReg(INTREG_R12, r.gpr[12]);
301 context->setIntReg(INTREG_SP, r.gpr[13]);
302 context->setIntReg(INTREG_LR, r.gpr[14]);
303 auto pc_state = context->pcState();
305 context->pcState(pc_state);
309 context->setMiscReg(MISCREG_FPSCR, r.fpscr);
310 context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr);
330 auto& annexMap = inAArch64(context()) ? annexMap64 : annexMap32;
341 if (inAArch64(context()))