Searched refs:base (Results 1 - 25 of 167) sorted by relevance

1234567

/gem5/src/dev/net/
H A Dpktfifo.cc33 #include "base/logging.hh"
69 PacketFifoEntry::serialize(const string &base, CheckpointOut &cp) const argument
71 packet->serialize(base + ".packet", cp);
72 paramOut(cp, base + ".slack", slack);
73 paramOut(cp, base + ".number", number);
74 paramOut(cp, base + ".priv", priv);
78 PacketFifoEntry::unserialize(const string &base, CheckpointIn &cp) argument
81 packet->unserialize(base + ".packet", cp);
82 paramIn(cp, base + ".slack", slack);
83 paramIn(cp, base
88 serialize(const string &base, CheckpointOut &cp) const argument
101 unserialize(const string &base, CheckpointIn &cp) argument
[all...]
H A Detherpkt.cc35 #include "base/inet.hh"
36 #include "base/logging.hh"
42 EthPacketData::serialize(const string &base, CheckpointOut &cp) const argument
44 paramOut(cp, base + ".simLength", simLength);
45 paramOut(cp, base + ".bufLength", bufLength);
46 paramOut(cp, base + ".length", length);
47 arrayParamOut(cp, base + ".data", data, length);
51 EthPacketData::unserialize(const string &base, CheckpointIn &cp) argument
53 paramIn(cp, base + ".length", length);
55 if (optParamIn(cp, base
[all...]
H A Detherpkt.hh43 #include "base/types.hh"
86 void serialize(const std::string &base, CheckpointOut &cp) const;
87 void unserialize(const std::string &base, CheckpointIn &cp);
H A Detherlink.cc55 #include "base/random.hh"
56 #include "base/trace.hh"
202 EtherLink::Link::serialize(const string &base, CheckpointOut &cp) const argument
205 paramOut(cp, base + ".packet_exists", packet_exists);
207 packet->serialize(base + ".packet", cp);
210 paramOut(cp, base + ".event_scheduled", event_scheduled);
213 paramOut(cp, base + ".event_time", event_time);
217 paramOut(cp, base + ".tx_queue_size", tx_queue_size);
220 paramOut(cp, csprintf("%s.txQueue[%i].tick", base, idx), pe.first);
221 pe.second->serialize(csprintf("%s.txQueue[%i].packet", base, id
228 unserialize(const string &base, CheckpointIn &cp) argument
[all...]
/gem5/src/arch/x86/
H A Demulenv.cc44 #include "base/logging.hh"
55 base = machInst.sib.base | (machInst.rex.b << 3);
56 //In this special case, we don't use a base. The displacement also
58 if (machInst.sib.base == INTREG_RBP && machInst.modRM.mod == 0)
59 base = NUM_INTREGS;
69 base = INTREG_RBX;
71 base = INTREG_RBP;
78 base = INTREG_RSI;
81 base
[all...]
H A Demulenv.hh57 RegIndex base; member in struct:X86ISA::EmulEnv
66 base(NUM_INTREGS),
H A Dinterrupts.hh59 #include "base/bitfield.hh"
127 findRegArrayMSB(ApicRegIndex base) argument
131 if (regs[base + offset] != 0) {
132 return offset * 32 + findMsbSet(regs[base + offset]);
151 setRegArrayBit(ApicRegIndex base, uint8_t vector) argument
153 regs[base + (vector / 32)] |= (1 << (vector % 32));
157 clearRegArrayBit(ApicRegIndex base, uint8_t vector) argument
159 regs[base + (vector / 32)] &= ~(1 << (vector % 32));
163 getRegArrayBit(ApicRegIndex base, uint8_t vector) argument
165 return bits(regs[base
[all...]
H A Dprocess.hh113 Addr base; member in class:X86ISA::X86_64Process::VSyscallPage
124 base = in.base;
155 Addr base; member in class:X86ISA::I386Process::VSyscallPage
166 base = in.base;
/gem5/util/
H A Dslicc32 base = dirname(__file__)
33 sys.path.insert(1, join(base, "../src/mem"))
34 sys.path.insert(1, join(base, "../src/python"))
35 sys.path.insert(1, join(base, "../ext/ply"))
/gem5/src/systemc/tests/systemc/utils/sc_vector/test02/
H A Dtest02.cpp55 struct base : sc_object struct in inherits:sc_object
57 base( const char* n ) : sc_object(n) {} function in struct:base
60 struct derived_0 : base
62 derived_0(const char* name) : base(name) {}
66 struct derived_1 : public base
68 derived_1(const char* name) : base(name) {}
73 base* fill_array( const char* n, size_t i )
81 sc_vector< base > arr;
/gem5/src/dev/
H A Dintel_8254_timer.cc35 #include "base/logging.hh"
75 Intel8254Timer::serialize(const string &base, CheckpointOut &cp) const argument
78 counter[0]->serialize(base + ".counter0", cp);
79 counter[1]->serialize(base + ".counter1", cp);
80 counter[2]->serialize(base + ".counter2", cp);
84 Intel8254Timer::unserialize(const string &base, CheckpointIn &cp) argument
87 counter[0]->unserialize(base + ".counter0", cp);
88 counter[1]->unserialize(base + ".counter1", cp);
89 counter[2]->unserialize(base + ".counter2", cp);
232 Intel8254Timer::Counter::serialize(const string &base, CheckpointOu argument
250 unserialize(const string &base, CheckpointIn &cp) argument
[all...]
/gem5/src/base/loader/
H A Draw_object.hh34 #include "base/loader/object_file.hh"
44 virtual bool loadAllSymbols(SymbolTable *symtab, Addr base = 0,
46 virtual bool loadGlobalSymbols(SymbolTable *symtab, Addr base = 0,
49 virtual bool loadLocalSymbols(SymbolTable *symtab, Addr base = 0,
H A Dsymtab.cc31 #include "base/loader/symtab.hh"
38 #include "base/logging.hh"
39 #include "base/str.hh"
40 #include "base/types.hh"
113 SymbolTable::serialize(const string &base, CheckpointOut &cp) const argument
115 paramOut(cp, base + ".size", addrTable.size());
120 paramOut(cp, csprintf("%s.addr_%d", base, i), p->first);
121 paramOut(cp, csprintf("%s.symbol_%d", base, i), p->second);
127 SymbolTable::unserialize(const string &base, CheckpointIn &cp) argument
131 paramIn(cp, base
[all...]
H A Decoff_object.hh34 #include "base/loader/object_file.hh"
54 virtual bool loadAllSymbols(SymbolTable *symtab, Addr base = 0,
56 virtual bool loadGlobalSymbols(SymbolTable *symtab, Addr base = 0,
58 virtual bool loadLocalSymbols(SymbolTable *symtab, Addr base = 0,
H A Daout_object.hh34 #include "base/loader/object_file.hh"
51 virtual bool loadAllSymbols(SymbolTable *symtab, Addr base = 0,
53 virtual bool loadGlobalSymbols(SymbolTable *symtab, Addr base = 0,
56 virtual bool loadLocalSymbols(SymbolTable *symtab, Addr base = 0,
H A Ddtb_object.hh34 #include "base/loader/object_file.hh"
69 bool loadAllSymbols(SymbolTable *symtab, Addr base = 0,
71 bool loadGlobalSymbols(SymbolTable *symtab, Addr base = 0,
73 bool loadLocalSymbols(SymbolTable *symtab, Addr base = 0,
H A Delf_object.hh49 #include "base/loader/object_file.hh"
84 Addr base, Addr offset);
100 virtual bool loadAllSymbols(SymbolTable *symtab, Addr base = 0,
104 virtual bool loadGlobalSymbols(SymbolTable *symtab, Addr base = 0,
108 virtual bool loadLocalSymbols(SymbolTable *symtab, Addr base = 0,
112 virtual bool loadWeakSymbols(SymbolTable *symtab, Addr base = 0,
/gem5/system/alpha/h/
H A Dev5_impure.h71 ** so some adjustments to the base offsets, as well as the offsets
72 ** within each base region, are necessary.
89 #define SAVE_GPR(reg,offset,base) \
90 stq_p reg, (SEXT10(offset-0x200))(base)
92 #define RESTORE_GPR(reg,offset,base) \
93 ldq_p reg, (SEXT10(offset-0x200))(base)
96 #define SAVE_FPR(reg,offset,base) \
97 stt reg, (SEXT10(offset-0x200))(base)
99 #define RESTORE_FPR(reg,offset,base) \
100 ldt reg, (SEXT10(offset-0x200))(base)
[all...]
/gem5/ext/systemc/src/sysc/communication/
H A Dsc_event_queue.h67 virtual void notify (double when, sc_time_unit base) =0;
94 inline virtual void notify (double when, sc_time_unit base);
112 void cancel (double when, sc_time_unit base);
119 unsigned pending(double when, sc_time_unit base) const;
133 void sc_event_queue::notify (double when, sc_time_unit base )
135 notify( sc_time(when,base) );
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/
H A Dma_addr.S28 #define MISALIGNED_LOAD_TEST(testnum, insn, base, offset, res) \
31 addi t1, base, offset; \
32 insn t1, offset(base); \
63 #define MISALIGNED_STORE_TEST(testnum, insn, base, offset, size) \
66 addi t1, base, offset; \
67 insn x0, offset(base); \
68 lb t1, (offset - 1)(base); \
70 lb t1, (offset + size)(base); \
72 lb t1, (offset + 0)(base); \
74 lb t1, (offset + size - 1)(base); \
[all...]
/gem5/src/arch/arm/insts/
H A Dsve_mem.hh53 IntRegIndex base; member in class:ArmISA::SveMemVecFillSpill
56 /// True if the base register is SP (used for SP alignment checking).
65 dest(_dest), base(_base), imm(_imm),
78 IntRegIndex base; member in class:ArmISA::SveMemPredFillSpill
81 /// True if the base register is SP (used for SP alignment checking).
90 dest(_dest), base(_base), imm(_imm),
104 IntRegIndex base; member in class:ArmISA::SveContigMemSS
107 /// True if the base register is SP (used for SP alignment checking).
116 dest(_dest), gp(_gp), base(_base), offset(_offset),
130 IntRegIndex base; member in class:ArmISA::SveContigMemSI
[all...]
/gem5/src/dev/arm/
H A Dsmmu_v3_events.hh43 #include <base/types.hh>
/gem5/util/style/
H A Dfile_types.py126 def find_files(base, languages=all_languages,
132 if base[-1] != '/':
133 base += '/'
142 # walk over base
143 for root,dirs,files in os.walk(base):
144 root = root.replace(base, '', 1)
155 fullpath = os.path.join(base, root, filename)
/gem5/src/base/
H A Dtime.cc31 #include "base/time.hh"
38 #include "base/logging.hh"
125 Time::serialize(const std::string &base, CheckpointOut &cp) const argument
127 paramOut(cp, base + ".sec", sec());
128 paramOut(cp, base + ".nsec", nsec());
132 Time::unserialize(const std::string &base, CheckpointIn &cp) argument
136 paramIn(cp, base + ".sec", secs);
137 paramIn(cp, base + ".nsec", nsecs);
/gem5/src/arch/x86/insts/
H A Dmicroldstop.cc58 printMem(response, segment, scale, index, base, disp,
75 printMem(response, segment, scale, index, base, disp,

Completed in 24 milliseconds

1234567