| /gem5/src/cpu/o3/ |
| H A D | regfile.hh | 55 #include "debug/IEW.hh"
189 DPRINTF(IEW, "RegFile: Access to int register %i, has data "
201 DPRINTF(IEW, "RegFile: Access to float register %i as int, "
213 DPRINTF(IEW, "RegFile: Access to vector register %i, has "
251 DPRINTF(IEW, "RegFile: Setting vector register %i[%d] to %lx\n",
265 DPRINTF(IEW, "RegFile: Access to element %d of vector register %i,"
277 DPRINTF(IEW, "RegFile: Access to predicate register %i, has "
296 DPRINTF(IEW, "RegFile: Access to cc register %i, has "
309 DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n",
321 DPRINTF(IEW, "RegFil
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| H A D | iew_impl.hh | 61 #include "debug/IEW.hh"
155 .desc("Number of cycles IEW is idle");
159 .desc("Number of cycles IEW is squashing");
163 .desc("Number of cycles IEW is blocking");
167 .desc("Number of cycles IEW is unblocking");
465 DPRINTF(IEW, "[tid:%i] Squashing all instructions.\n", tid);
475 DPRINTF(IEW,
501 DPRINTF(IEW, "[tid:%i] [sn:%llu] Squashing from a specific instruction,"
527 DPRINTF(IEW, "[tid:%i] Memory violation, squashing violator and younger "
554 DPRINTF(IEW, "[ti
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| H A D | cpu_policy.hh | 85 typedef DefaultIEW<Impl> IEW; typedef in struct:SimpleCPUPolicy
95 /** The struct for communication between rename and IEW. */
98 /** The struct for communication between IEW and commit. */
101 /** The struct for communication within the IEW stage. */
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| H A D | commit.hh | 101 typedef typename CPUPol::IEW IEW; typedef in class:DefaultCommit
166 /** Sets the pointer to the queue coming from IEW. */
169 /** Sets the pointer to the IEW stage. */
170 void setIEWStage(IEW *iew_stage);
172 /** The pointer to the IEW stage. Used solely to ensure that
176 IEW *iewStage;
214 /** Handles any squashes that are sent from IEW, and adds instructions
301 /** Marks completed instructions using information sent from IEW. */
337 /** Wire to read information from IEW (fo
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| H A D | inst_queue.hh | 77 * requiring IEW to be able to peek into the IQ. At the end of the execution
90 typedef typename Impl::CPUPol::IEW IEW; typedef in class:InstructionQueue
126 InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params);
289 /** Pointer to IEW stage. */
290 IEW *iewStage;
438 * @todo: Make there be a distinction between the delays within IEW.
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| H A D | rename.hh | 85 typedef typename CPUPol::IEW IEW; typedef in class:DefaultRename
153 /** Sets pointer to IEW stage. Used only for initialization. */
154 void setIEWStage(IEW *iew_stage)
162 /** Pointer to IEW stage. Used only for initialization. */
163 IEW *iew_ptr;
334 /** Wire to get IEW's output from backwards time buffer. */
346 /** Wire to write any information heading to IEW. */
448 /** The index of the instruction in the time buffer to IEW that rename is
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| H A D | lsq_unit.hh | 88 typedef typename Impl::CPUPol::IEW IEW; typedef in class:LSQUnit
227 void init(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params,
358 /** Writes back the instruction, sending it to IEW. */
390 /** Pointer to the IEW stage. */
391 IEW *iewStage;
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| H A D | lsq.hh | 70 typedef typename Impl::CPUPol::IEW IEW; typedef in class:LSQ
819 LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params);
1042 /** The IEW stage pointer. */
1043 IEW *iewStage;
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| H A D | cpu.hh | 569 typename CPUPolicy::IEW iew;
645 /** The IEW stage's instruction queue. */
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| H A D | lsq_unit_impl.hh | 57 #include "debug/IEW.hh"
156 LSQUnit<Impl>::init(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params,
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| H A D | inst_queue_impl.hh | 88 InstructionQueue<Impl>::InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr,
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| H A D | lsq_impl.hh | 63 LSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
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| H A D | commit_impl.hh | 287 // Setup wire to send information back to IEW.
290 // Setup wire to read data from IEW (for the ROB).
320 // Setup wire to get instructions from IEW.
326 DefaultCommit<Impl>::setIEWStage(IEW *iew_stage)
957 // ROB is empty, b) there are no outstanding stores, c) IEW
963 // commit and IEW.
1376 // Grab completed insts out of the IEW instruction queue, and mark
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