| /gem5/src/arch/x86/insts/ |
| H A D | static_inst.cc | 269 std::string X86StaticInst::generateDisassembly(Addr pc, argument
|
| /gem5/src/arch/sparc/insts/ |
| H A D | static_inst.cc | 251 SparcStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
|
| /gem5/src/arch/x86/ |
| H A D | types.hh | 320 return (this->npc() != this->pc() + size()) ||
|
| /gem5/src/gpu-compute/ |
| H A D | fetch_unit.cc | 119 Addr vaddr = wavefront->pc();
|
| H A D | compute_unit.cc | 751 pkt->req->setPC(gpuDynInst->wavefront()->pc());
|
| /gem5/src/cpu/pred/ |
| H A D | tournament.cc | 237 TournamentBP::uncondBranch(ThreadID tid, Addr pc, void * &bp_history)
|
| H A D | multiperspective_perceptron.cc | 544 MultiperspectivePerceptron::uncondBranch(ThreadID tid, Addr pc, argument
547 MPPBranchInfo *bi = new MPPBranchInfo(pc, pcshift, false);
551 unsigned short int pc2 = pc >> 2;
552 bool ab = !(pc & (1<<pcbit));
|
| /gem5/src/mem/ruby/system/ |
| H A D | GPUCoalescer.cc | 880 // If valid, copy the pc to the ruby request
881 Addr pc = 0; local
883 pc = pkt->req->getPC();
927 pkt->getSize(), pc, secondary_type,
936 pkt->getSize(), pc, secondary_type,
|
| H A D | GPUCoalescer.hh | 227 Addr pc, RubyAccessMode access_mode,
|
| /gem5/src/cpu/o3/ |
| H A D | iew_impl.hh | 511 TheISA::PCState pc = inst->pcState(); local
512 TheISA::advancePC(pc, inst->staticInst);
514 toCommit->pc[tid] = pc;
540 toCommit->pc[tid] = inst->pcState();
|
| H A D | lsq.hh | 461 MasterID mid, Addr pc)
463 request()->setVirt(asid, vaddr, size, flags_, mid, pc);
460 setVirt(int asid, Addr vaddr, unsigned size, Request::Flags flags_, MasterID mid, Addr pc) argument
|
| H A D | dyn_inst.hh | 82 ¯oop, TheISA::PCState pc, TheISA::PCState predPC,
|
| H A D | cpu.cc | 870 auto pc = this->pcState(tid); local
873 auto new_mode = RenameMode<TheISA::ISA>::mode(pc);
|
| /gem5/src/cpu/o3/probe/ |
| H A D | elastic_trace.cc | 415 new_record->pc = head_inst->instAddr();
831 dep_pkt.set_pc(temp_ptr->pc);
|
| /gem5/src/arch/arm/ |
| H A D | isa.hh | 772 mode(const ArmISA::PCState& pc) argument
774 if (pc.aarch64()) {
|
| /gem5/system/alpha/h/ |
| H A D | dc21164FromGasSources.h | 681 #define stq_cp hw_stq/pc
|
| /gem5/ext/pybind11/include/pybind11/ |
| H A D | pybind11.h | 227 for (auto *pc = text; *pc != '\0'; ++pc) {
228 const auto c = *pc;
232 if (*(pc + 1) == '*')
|
| /gem5/src/arch/x86/regs/ |
| H A D | misc.hh | 807 Bitfield<19> pc; // Pin control member in namespace:X86ISA
|
| /gem5/src/arch/mips/ |
| H A D | isa.cc | 220 cfg1.pc = cp.CP0_Config1_PC;
|
| /gem5/src/arch/arm/insts/ |
| H A D | static_inst.cc | 313 ccprintf(os, "pc");
621 ArmStaticInst::generateDisassembly(Addr pc,
|
| /gem5/src/sim/ |
| H A D | syscall_emul.hh | 1892 Addr pc = tc->pcState().pc(); local
1894 if (pc >= text_start && pc < text_end) {
|
| /gem5/src/cpu/minor/ |
| H A D | lsq.cc | 1638 inst->pc.instAddr(), std::move(amo_op));
|