/gem5/src/sim/ |
H A D | mem_state.hh | 93 serialize(CheckpointOut &cp) const override 104 unserialize(CheckpointIn &cp) override
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/gem5/src/arch/x86/ |
H A D | pagetable.hh | 118 void serialize(CheckpointOut &cp) const override; member in struct:X86ISA::TlbEntry 119 void unserialize(CheckpointIn &cp) override; member in struct:X86ISA::TlbEntry
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/gem5/src/base/ |
H A D | trace.hh | 107 const std::string &message) override; member in class:Trace::OstreamLogger 109 std::ostream &getOstream() override { return stream; }
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/gem5/src/mem/ |
H A D | abstract_mem.hh | 210 void init() override; member in class:AbstractMemory 325 void regStats() override; member in class:AbstractMemory
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H A D | addr_mapper.hh | 67 PortID idx=InvalidPortID) override; member in class:AddrMapper 69 void init() override; member in class:AddrMapper
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H A D | mem_checker_monitor.hh | 74 PortID idx=InvalidPortID) override; member in class:MemCheckerMonitor 76 void init() override; member in class:MemCheckerMonitor
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H A D | dram_ctrl.hh | 366 * potentially override an already scheduled transition. 1176 void regStats() override; member in class:DRAMCtrl 1180 DrainState drain() override; member in class:DRAMCtrl 1183 PortID idx=InvalidPortID) override; member in class:DRAMCtrl 1185 virtual void init() override; member in class:DRAMCtrl 1186 virtual void startup() override; member in class:DRAMCtrl 1187 virtual void drainResume() override; member in class:DRAMCtrl
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/gem5/src/mem/cache/prefetch/ |
H A D | signature_path.hh | 106 void reset() override 281 std::vector<AddrPriority> &addresses) override; member in class:SignaturePathPrefetcher
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H A D | stride.hh | 176 std::vector<AddrPriority> &addresses) override; member in class:StridePrefetcher
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H A D | pif.hh | 167 void notify(const Addr& pc) override; member in class:PIFPrefetcher::PrefetchListenerPC
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/gem5/src/cpu/pred/ |
H A D | loop_predictor.hh | 254 void init() override; member in class:LoopPredictor 259 void regStats() override; member in class:LoopPredictor
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/gem5/src/mem/ruby/network/ |
H A D | Network.hh | 85 void init() override; member in class:Network 138 getPort(const std::string &, PortID idx=InvalidPortID) override
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/gem5/src/gpu-compute/ |
H A D | tlb_coalescer.hh | 146 void regStats() override; member in class:TLBCoalescer 215 PortID idx=InvalidPortID) override; member in class:TLBCoalescer
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H A D | gpu_tlb.hh | 220 void regStats() override; member in class:X86ISA::GpuTLB 238 virtual void serialize(CheckpointOut& cp) const override; member in class:X86ISA::GpuTLB 239 virtual void unserialize(CheckpointIn& cp) override; member in class:X86ISA::GpuTLB 312 PortID idx=InvalidPortID) override; member in class:X86ISA::GpuTLB
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/gem5/src/dev/pci/ |
H A D | copy_engine_defs.hh | 128 void serialize(CheckpointOut &cp) const override 136 void unserialize(CheckpointIn &cp) override 200 void serialize(CheckpointOut &cp) const override 210 void unserialize(CheckpointIn &cp) override
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/gem5/ext/nomali/lib/ |
H A D | nomali_api.cc | 83 void reset() override { 89 void intJob(int set) override { api.callbackInt(NOMALI_INT_JOB, set); } 90 void intMMU(int set) override { api.callbackInt(NOMALI_INT_MMU, set); } 91 void intGPU(int set) override { api.callbackInt(NOMALI_INT_GPU, set); }
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/gem5/src/arch/arm/linux/ |
H A D | system.hh | 148 std::string &next_task_str, int32_t &mm) override; member in class:DumpStatsPCEvent64
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/gem5/src/systemc/core/ |
H A D | sc_main_python.cc | 99 run(pybind11::module &systemc) override
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H A D | sc_time_python.cc | 41 run(pybind11::module &systemc) override
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/gem5/src/arch/sparc/insts/ |
H A D | nop.cc | 60 const SymbolTable *symtab) const override; member in class:Nop
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/gem5/src/arch/sparc/linux/ |
H A D | process.cc | 55 load(ProcessParams *params, ObjectFile *obj_file) override
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/gem5/src/dev/arm/ |
H A D | ufs_device.hh | 176 DrainState drain() override; member in class:UFSHostDevice 178 void serialize(CheckpointOut &cp) const override; member in class:UFSHostDevice 179 void unserialize(CheckpointIn &cp) override; member in class:UFSHostDevice 830 AddrRangeList getAddrRanges() const override; member in class:UFSHostDevice 835 Tick read(PacketPtr pkt) override; member in class:UFSHostDevice 836 Tick write(PacketPtr pkt) override; member in class:UFSHostDevice 995 void regStats() override; member in class:UFSHostDevice
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H A D | gic_v3_cpu_interface.hh | 326 void serialize(CheckpointOut & cp) const override; member in class:Gicv3CPUInterface 327 void unserialize(CheckpointIn & cp) override; member in class:Gicv3CPUInterface 350 RegVal readMiscReg(int misc_reg) override; member in class:Gicv3CPUInterface 351 void setMiscReg(int misc_reg, RegVal val) override; member in class:Gicv3CPUInterface 352 void setThreadContext(ThreadContext *tc) override; member in class:Gicv3CPUInterface
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/gem5/src/arch/arm/insts/ |
H A D | macromem.hh | 76 advancePC(PCState &pcState) const override 97 advancePC(PCState &pcState) const override 267 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroSetPCCPSR 286 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroIntMov 306 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroIntImmOp 323 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroIntImmXOp 342 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroIntOp 362 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroIntRegXOp 402 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroMemOp 423 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::MicroMemPairOp [all...] |
/gem5/src/cpu/minor/ |
H A D | lsq.hh | 101 bool recvTimingResp(PacketPtr pkt) override 104 void recvReqRetry() override { lsq.recvReqRetry(); } 106 bool isSnooping() const override { return true; } 108 void recvTimingSnoopReq(PacketPtr pkt) override 111 void recvFunctionalSnoop(PacketPtr pkt) override { }
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