1/*
2 * Copyright (c) 2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 */
40
41/*
42 * The Network class is the base class for classes that implement the
43 * interconnection network between components (processor/cache
44 * components and memory/directory components).  The interconnection
45 * network as described here is not a physical network, but a
46 * programming concept used to implement all communication between
47 * components.  Thus parts of this 'network' will model the on-chip
48 * connections between cache controllers and directory controllers as
49 * well as the links between chip and network switches.
50 */
51
52#ifndef __MEM_RUBY_NETWORK_NETWORK_HH__
53#define __MEM_RUBY_NETWORK_NETWORK_HH__
54
55#include <iostream>
56#include <string>
57#include <unordered_map>
58#include <vector>
59
60#include "base/addr_range.hh"
61#include "base/types.hh"
62#include "mem/packet.hh"
63#include "mem/port.hh"
64#include "mem/ruby/common/MachineID.hh"
65#include "mem/ruby/common/TypeDefines.hh"
66#include "mem/ruby/network/Topology.hh"
67#include "mem/ruby/network/dummy_port.hh"
68#include "mem/ruby/protocol/LinkDirection.hh"
69#include "mem/ruby/protocol/MessageSizeType.hh"
70#include "params/RubyNetwork.hh"
71#include "sim/clocked_object.hh"
72
73class NetDest;
74class MessageBuffer;
75
76class Network : public ClockedObject
77{
78  public:
79    typedef RubyNetworkParams Params;
80    Network(const Params *p);
81    const Params * params() const
82    { return dynamic_cast<const Params *>(_params); }
83
84    virtual ~Network();
85    void init() override;
86
87    static uint32_t getNumberOfVirtualNetworks() { return m_virtual_networks; }
88    int getNumNodes() const { return m_nodes; }
89
90    static uint32_t MessageSizeType_to_int(MessageSizeType size_type);
91
92    // returns the queue requested for the given component
93    void setToNetQueue(NodeID id, bool ordered, int netNumber,
94                               std::string vnet_type, MessageBuffer *b);
95    virtual void setFromNetQueue(NodeID id, bool ordered, int netNumber,
96                                 std::string vnet_type, MessageBuffer *b);
97
98    virtual void checkNetworkAllocation(NodeID id, bool ordered,
99        int network_num, std::string vnet_type);
100
101    virtual void makeExtOutLink(SwitchID src, NodeID dest, BasicLink* link,
102                             const NetDest& routing_table_entry) = 0;
103    virtual void makeExtInLink(NodeID src, SwitchID dest, BasicLink* link,
104                            const NetDest& routing_table_entry) = 0;
105    virtual void makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
106                                  const NetDest& routing_table_entry,
107                                  PortDirection src_outport,
108                                  PortDirection dst_inport) = 0;
109
110    virtual void collateStats() = 0;
111    virtual void print(std::ostream& out) const = 0;
112
113    /*
114     * Virtual functions for functionally reading and writing packets in
115     * the network. Each network needs to implement these for functional
116     * accesses to work correctly.
117     */
118    virtual bool functionalRead(Packet *pkt)
119    { fatal("Functional read not implemented.\n"); }
120    virtual uint32_t functionalWrite(Packet *pkt)
121    { fatal("Functional write not implemented.\n"); }
122
123    /**
124     * Map an address to the correct NodeID
125     *
126     * This function traverses the global address map to find the
127     * NodeID that corresponds to the given address and the type of
128     * the destination. For example for a request to a directory this
129     * function will return the NodeID of the right directory.
130     *
131     * @param the destination address
132     * @param the type of the destination
133     * @return the NodeID of the destination
134     */
135    NodeID addressToNodeID(Addr addr, MachineType mtype);
136
137    Port &
138    getPort(const std::string &, PortID idx=InvalidPortID) override
139    {
140        return RubyDummyPort::instance();
141    }
142
143  protected:
144    // Private copy constructor and assignment operator
145    Network(const Network& obj);
146    Network& operator=(const Network& obj);
147
148    uint32_t m_nodes;
149    static uint32_t m_virtual_networks;
150    std::vector<std::string> m_vnet_type_names;
151    Topology* m_topology_ptr;
152    static uint32_t m_control_msg_size;
153    static uint32_t m_data_msg_size;
154
155    // vector of queues from the components
156    std::vector<std::vector<MessageBuffer*> > m_toNetQueues;
157    std::vector<std::vector<MessageBuffer*> > m_fromNetQueues;
158    std::vector<bool> m_ordered;
159
160  private:
161    //! Callback class used for collating statistics from all the
162    //! controller of this type.
163    class StatsCallback : public Callback
164    {
165      private:
166        Network *ctr;
167
168      public:
169        virtual ~StatsCallback() {}
170
171        StatsCallback(Network *_ctr)
172            : ctr(_ctr)
173        {
174        }
175
176        void process() {ctr->collateStats();}
177    };
178
179    // Global address map
180    struct AddrMapNode {
181        NodeID id;
182        AddrRangeList ranges;
183    };
184    std::unordered_multimap<MachineType, AddrMapNode> addrMap;
185};
186
187inline std::ostream&
188operator<<(std::ostream& out, const Network& obj)
189{
190    obj.print(out);
191    out << std::flush;
192    return out;
193}
194
195#endif // __MEM_RUBY_NETWORK_NETWORK_HH__
196