14159Sgblack@eecs.umich.edu/* 210299Salexandru.dutu@amd.com * Copyright (c) 2014 Advanced Micro Devices, Inc. 34159Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 44159Sgblack@eecs.umich.edu * All rights reserved. 54159Sgblack@eecs.umich.edu * 67087Snate@binkert.org * The license below extends only to copyright in the software and shall 77087Snate@binkert.org * not be construed as granting a license to any other intellectual 87087Snate@binkert.org * property including but not limited to intellectual property relating 97087Snate@binkert.org * to a hardware implementation of the functionality of the software 107087Snate@binkert.org * licensed hereunder. You may use the software subject to the license 117087Snate@binkert.org * terms below provided that you ensure that this notice is replicated 127087Snate@binkert.org * unmodified and in its entirety in all distributions of the software, 137087Snate@binkert.org * modified or unmodified, in source code or in binary form. 144159Sgblack@eecs.umich.edu * 157087Snate@binkert.org * Redistribution and use in source and binary forms, with or without 167087Snate@binkert.org * modification, are permitted provided that the following conditions are 177087Snate@binkert.org * met: redistributions of source code must retain the above copyright 187087Snate@binkert.org * notice, this list of conditions and the following disclaimer; 197087Snate@binkert.org * redistributions in binary form must reproduce the above copyright 207087Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 217087Snate@binkert.org * documentation and/or other materials provided with the distribution; 227087Snate@binkert.org * neither the name of the copyright holders nor the names of its 234159Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 247087Snate@binkert.org * this software without specific prior written permission. 254159Sgblack@eecs.umich.edu * 264159Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 274159Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 284159Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 294159Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 304159Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 314159Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 324159Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 334159Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 344159Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 354159Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 364159Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 374159Sgblack@eecs.umich.edu * 384159Sgblack@eecs.umich.edu * Authors: Gabe Black 394159Sgblack@eecs.umich.edu */ 404159Sgblack@eecs.umich.edu 414159Sgblack@eecs.umich.edu#ifndef __ARCH_X86_PAGETABLE_HH__ 424159Sgblack@eecs.umich.edu#define __ARCH_X86_PAGETABLE_HH__ 434159Sgblack@eecs.umich.edu 445124Sgblack@eecs.umich.edu#include <iostream> 455124Sgblack@eecs.umich.edu#include <string> 4610299Salexandru.dutu@amd.com#include <vector> 475124Sgblack@eecs.umich.edu 485237Sgblack@eecs.umich.edu#include "base/bitunion.hh" 496216Snate@binkert.org#include "base/types.hh" 508953Sgblack@eecs.umich.edu#include "base/trie.hh" 5110299Salexandru.dutu@amd.com#include "arch/x86/system.hh" 5210299Salexandru.dutu@amd.com#include "debug/MMU.hh" 534159Sgblack@eecs.umich.edu 545124Sgblack@eecs.umich.educlass Checkpoint; 5511800Sbrandon.potter@amd.comclass ThreadContext; 565124Sgblack@eecs.umich.edu 574159Sgblack@eecs.umich.edunamespace X86ISA 584159Sgblack@eecs.umich.edu{ 598953Sgblack@eecs.umich.edu struct TlbEntry; 608953Sgblack@eecs.umich.edu} 618953Sgblack@eecs.umich.edu 628953Sgblack@eecs.umich.edutypedef Trie<Addr, X86ISA::TlbEntry> TlbEntryTrie; 638953Sgblack@eecs.umich.edu 648953Sgblack@eecs.umich.edunamespace X86ISA 658953Sgblack@eecs.umich.edu{ 6610905Sandreas.sandberg@arm.com struct TlbEntry : public Serializable 674159Sgblack@eecs.umich.edu { 685124Sgblack@eecs.umich.edu // The base of the physical page. 695184Sgblack@eecs.umich.edu Addr paddr; 705184Sgblack@eecs.umich.edu 715184Sgblack@eecs.umich.edu // The beginning of the virtual page this entry maps. 725184Sgblack@eecs.umich.edu Addr vaddr; 738953Sgblack@eecs.umich.edu // The size of the page this represents, in address bits. 748953Sgblack@eecs.umich.edu unsigned logBytes; 755184Sgblack@eecs.umich.edu 765124Sgblack@eecs.umich.edu // Read permission is always available, assuming it isn't blocked by 775124Sgblack@eecs.umich.edu // other mechanisms. 785184Sgblack@eecs.umich.edu bool writable; 795124Sgblack@eecs.umich.edu // Whether this page is accesible without being in supervisor mode. 805124Sgblack@eecs.umich.edu bool user; 815124Sgblack@eecs.umich.edu // Whether to use write through or write back. M5 ignores this and 825124Sgblack@eecs.umich.edu // lets the caches handle the writeback policy. 835124Sgblack@eecs.umich.edu //bool pwt; 845124Sgblack@eecs.umich.edu // Whether the page is cacheable or not. 855124Sgblack@eecs.umich.edu bool uncacheable; 865124Sgblack@eecs.umich.edu // Whether or not to kick this page out on a write to CR3. 875124Sgblack@eecs.umich.edu bool global; 885124Sgblack@eecs.umich.edu // A bit used to form an index into the PAT table. 895124Sgblack@eecs.umich.edu bool patBit; 905124Sgblack@eecs.umich.edu // Whether or not memory on this page can be executed. 915124Sgblack@eecs.umich.edu bool noExec; 928953Sgblack@eecs.umich.edu // A sequence number to keep track of LRU. 938953Sgblack@eecs.umich.edu uint64_t lruSeq; 948953Sgblack@eecs.umich.edu 958953Sgblack@eecs.umich.edu TlbEntryTrie::Handle trieHandle; 965124Sgblack@eecs.umich.edu 9710558Salexandru.dutu@amd.com TlbEntry(Addr asn, Addr _vaddr, Addr _paddr, 9810558Salexandru.dutu@amd.com bool uncacheable, bool read_only); 9910905Sandreas.sandberg@arm.com TlbEntry(); 1005124Sgblack@eecs.umich.edu 1015877Shsul@eecs.umich.edu void 1025877Shsul@eecs.umich.edu updateVaddr(Addr new_vaddr) 1035877Shsul@eecs.umich.edu { 1045877Shsul@eecs.umich.edu vaddr = new_vaddr; 1055877Shsul@eecs.umich.edu } 1065877Shsul@eecs.umich.edu 1075184Sgblack@eecs.umich.edu Addr pageStart() 1085184Sgblack@eecs.umich.edu { 1095184Sgblack@eecs.umich.edu return paddr; 1105184Sgblack@eecs.umich.edu } 1115124Sgblack@eecs.umich.edu 1129115SBrad.Beckmann@amd.com // Return the page size in bytes 1139115SBrad.Beckmann@amd.com int size() 1149115SBrad.Beckmann@amd.com { 1159115SBrad.Beckmann@amd.com return (1 << logBytes); 1169115SBrad.Beckmann@amd.com } 1179115SBrad.Beckmann@amd.com 11811168Sandreas.hansson@arm.com void serialize(CheckpointOut &cp) const override; 11911168Sandreas.hansson@arm.com void unserialize(CheckpointIn &cp) override; 1204159Sgblack@eecs.umich.edu }; 12110299Salexandru.dutu@amd.com 12210299Salexandru.dutu@amd.com 12312460Sgabeblack@google.com BitUnion64(VAddr) 12412460Sgabeblack@google.com Bitfield<20, 12> longl1; 12512460Sgabeblack@google.com Bitfield<29, 21> longl2; 12612460Sgabeblack@google.com Bitfield<38, 30> longl3; 12712460Sgabeblack@google.com Bitfield<47, 39> longl4; 12810299Salexandru.dutu@amd.com 12912460Sgabeblack@google.com Bitfield<20, 12> pael1; 13012460Sgabeblack@google.com Bitfield<29, 21> pael2; 13112460Sgabeblack@google.com Bitfield<31, 30> pael3; 13212460Sgabeblack@google.com 13312460Sgabeblack@google.com Bitfield<21, 12> norml1; 13412460Sgabeblack@google.com Bitfield<31, 22> norml2; 13512460Sgabeblack@google.com EndBitUnion(VAddr) 13612460Sgabeblack@google.com 13712460Sgabeblack@google.com // Unfortunately, the placement of the base field in a page table entry is 13812460Sgabeblack@google.com // very erratic and would make a mess here. It might be moved here at some 13912460Sgabeblack@google.com // point in the future. 14012460Sgabeblack@google.com BitUnion64(PageTableEntry) 14112460Sgabeblack@google.com Bitfield<63> nx; 14212460Sgabeblack@google.com Bitfield<51, 12> base; 14312460Sgabeblack@google.com Bitfield<11, 9> avl; 14412460Sgabeblack@google.com Bitfield<8> g; 14512460Sgabeblack@google.com Bitfield<7> ps; 14612460Sgabeblack@google.com Bitfield<6> d; 14712460Sgabeblack@google.com Bitfield<5> a; 14812460Sgabeblack@google.com Bitfield<4> pcd; 14912460Sgabeblack@google.com Bitfield<3> pwt; 15012460Sgabeblack@google.com Bitfield<2> u; 15112460Sgabeblack@google.com Bitfield<1> w; 15212460Sgabeblack@google.com Bitfield<0> p; 15312460Sgabeblack@google.com EndBitUnion(PageTableEntry) 15412460Sgabeblack@google.com 15512460Sgabeblack@google.com template <int first, int last> 15612460Sgabeblack@google.com class LongModePTE 15710299Salexandru.dutu@amd.com { 15810299Salexandru.dutu@amd.com public: 15912460Sgabeblack@google.com Addr paddr() { return pte.base << PageShift; } 16012460Sgabeblack@google.com void paddr(Addr addr) { pte.base = addr >> PageShift; } 16112460Sgabeblack@google.com 16212460Sgabeblack@google.com bool present() { return pte.p; } 16312460Sgabeblack@google.com void present(bool p) { pte.p = p ? 1 : 0; } 16412460Sgabeblack@google.com 16512460Sgabeblack@google.com bool uncacheable() { return pte.pcd; } 16612460Sgabeblack@google.com void uncacheable(bool u) { pte.pcd = u ? 1 : 0; } 16712460Sgabeblack@google.com 16812460Sgabeblack@google.com bool readonly() { return !pte.w; } 16912460Sgabeblack@google.com void readonly(bool r) { pte.w = r ? 0 : 1; } 17012460Sgabeblack@google.com 17112460Sgabeblack@google.com void 17212460Sgabeblack@google.com read(PortProxy &p, Addr table, Addr vaddr) 17310299Salexandru.dutu@amd.com { 17412460Sgabeblack@google.com entryAddr = table; 17512460Sgabeblack@google.com entryAddr += bits(vaddr, first, last) * sizeof(PageTableEntry); 17612460Sgabeblack@google.com pte = p.read<PageTableEntry>(entryAddr); 17710299Salexandru.dutu@amd.com } 17810299Salexandru.dutu@amd.com 17912460Sgabeblack@google.com void 18012460Sgabeblack@google.com reset(Addr _paddr, bool _present=true, 18112460Sgabeblack@google.com bool _uncacheable=false, bool _readonly=false) 18210299Salexandru.dutu@amd.com { 18312460Sgabeblack@google.com pte = 0; 18412460Sgabeblack@google.com pte.u = 1; 18512460Sgabeblack@google.com paddr(_paddr); 18612460Sgabeblack@google.com present(_present); 18712460Sgabeblack@google.com uncacheable(_uncacheable); 18812460Sgabeblack@google.com readonly(_readonly); 18912460Sgabeblack@google.com }; 19012460Sgabeblack@google.com 19112460Sgabeblack@google.com void write(PortProxy &p) { p.write(entryAddr, pte); } 19212460Sgabeblack@google.com 19312460Sgabeblack@google.com static int 19412460Sgabeblack@google.com tableSize() 19512460Sgabeblack@google.com { 19612460Sgabeblack@google.com return 1 << ((first - last) + 4 - PageShift); 19710299Salexandru.dutu@amd.com } 19810299Salexandru.dutu@amd.com 19912460Sgabeblack@google.com protected: 20012460Sgabeblack@google.com PageTableEntry pte; 20112460Sgabeblack@google.com Addr entryAddr; 20210299Salexandru.dutu@amd.com }; 2034159Sgblack@eecs.umich.edu} 2044159Sgblack@eecs.umich.edu 2054159Sgblack@eecs.umich.edu#endif 206