#
12090:11d69759b378 |
|
04-Apr-2017 |
Paul Rosenfeld <prosenfeld@micron.com> |
arm,sim: fix context switch stats dumps for ARM64/Linux
32bit and 64bit Linux have different arguments passed to the __switch_to() function that gem5 hooks into in order to collect context switch statistics. 64bit Linux provides the task_struct pointer to the next task that will be switched to, which means we don't have to look up the task_struct from thread_info as we do in 32bit ARM Linux.
This patch adds a second set of accessors to ThreadInfo to extract details such as the pid, tgid, task name, etc., directly from a task_struct. The existing accessors maintain their existing behavior by first looking up the task_struct and then calling these new accessors.
A 64-bit variant of the DumpStatsPCEvent class is added that uses these new accessors to get the task details for the context switch dumps directly from the task_struct passed to __switch_to().
Change-Id: I63c4b3e1ad64446751a91f6340901d5180d7382d Reviewed-on: https://gem5-review.googlesource.com/2640 Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Pau Cabre <pau.cabre@metempsy.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
|
#
11538:55014a40512c |
|
20-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
kern, arm: Dump dmesg on kernel panic/oops
Add helper functions to dump the guest kernel's dmesg buffer to a text file in m5out. This functionality is split into two parts. First, a dmesg dump function that can be used in other places:
void Linux::dumpDmesg(ThreadContext *, std::ostream &)
This function is used to implement two PCEvents: DmesgDumpEvent and KernelPanic event. The only difference between the two is that the latter produces a gem5 panic instead of a warning in addition to dumping the kernel log.
Change-Id: I6d2af1d666ace57124089648ea906f6c787ac63c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
|
#
11359:b0b976a1ceda |
|
27-Nov-2015 |
Andreas Sandberg <andreas@sandberg.pp.se> |
base: Add support for changing output directories
This changeset adds support for changing the simulator output directory. This can be useful when the simulation goes through several stages (e.g., a warming phase, a simulation phase, and a verification phase) since it allows the output from each stage to be located in a different directory. Relocation is done by calling core.setOutputDir() from Python or simout.setOutputDirectory() from C++.
This change affects several parts of the design of the gem5's output subsystem. First, files returned by an OutputDirectory instance (e.g., simout) are of the type OutputStream instead of a std::ostream. This allows us to do some more book keeping and control re-opening of files when the output directory is changed. Second, new subdirectories are OutputDirectory instances, which should be used to create files in that sub-directory.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se> [sascha.bischoff@arm.com: Rebased patches onto a newer gem5 version] Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
|
#
10822:d259f2bc2b31 |
|
05-May-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
arm: Remove unnecessary boot uncachability
With the recent patches addressing how we deal with uncacheable accesses there is no longer need for the work arounds put in place to enforce certain sections of memory to be uncacheable during boot.
|
#
10810:683ab55819fd |
|
29-Apr-2015 |
Ruslan Bukin <br@bsdpad.com> |
arch, base, dev, kern, sym: FreeBSD support
This adds support for FreeBSD/aarch64 FS and SE mode (basic set of syscalls only)
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
|
#
10037:5cac77888310 |
|
24-Jan-2014 |
ARM gem5 Developers |
arm: Add support for ARMv8 (AArch64 & AArch32)
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64 kernel you are restricted to AArch64 user-mode binaries. This will be addressed in a later patch.
Note: Virtualization is only supported in AArch32 mode. This will also be fixed in a later patch.
Contributors: Giacomo Gabrielli (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation) Thomas Grocutt (AArch32 Virtualization, AArch64 FP, validation) Mbou Eyole (AArch64 NEON, validation) Ali Saidi (AArch64 Linux support, code integration, validation) Edmund Grimley-Evans (AArch64 FP) William Wang (AArch64 Linux support) Rene De Jong (AArch64 Linux support, performance opt.) Matt Horsnell (AArch64 MP, validation) Matt Evans (device models, code integration, validation) Chris Adeniyi-Jones (AArch64 syscall-emulation) Prakash Ramrakhyani (validation) Dam Sunwoo (validation) Chander Sudanthi (validation) Stephan Diestelhorst (validation) Andreas Hansson (code integration, performance opt.) Eric Van Hensbergen (performance opt.) Gabe Black
|
#
9649:c717bd5e0a1d |
|
22-Apr-2013 |
Andreas Sandberg <Andreas.Sandberg@ARM.com> |
arm: Enable support for triggering a sim panic on kernel panics
Add the options 'panic_on_panic' and 'panic_on_oops' to the LinuxArmSystem SimObject. When these option are enabled, the simulator panics when the guest kernel panics or oopses. Enable panic on panic and panic on oops in ARM-based test cases.
|
#
9332:ae2a5329ce96 |
|
02-Nov-2012 |
Dam Sunwoo <dam.sunwoo@arm.com> |
ARM: dump stats and process info on context switches
This patch enables dumping statistics and Linux process information on context switch boundaries (__switch_to() calls) that are used for Streamline integration (a graphical statistics viewer from ARM).
|
#
8870:f95c4042f2d0 |
|
01-Mar-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: Add support for Versatile Express extended memory map
Also clean up how we create boot loader memory a bit.
|
#
8527:6bac5b04d588 |
|
19-Aug-2011 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: Mark some variables uncacheable until boot all CPUs are enabled.
There are a set of locations is the linux kernel that are managed via cache maintence instructions until all processors enable their MMUs & TLBs. Writes to these locations are manually flushed from the cache to main memory when the occur so that cores operating without their MMU enabled and only issuing uncached accesses can receive the correct data. Unfortuantely, gem5 doesn't support any kind of software directed maintence of the cache. Until such time as that support exists this patch marks the specific cache blocks that need to be coherent as non-cacheable until all CPUs enable their MMU and thus allows gem5 to boot MP systems with caches enabled (a requirement for booting an O3 cpu and thus an O3 CPU regression).
|
#
8143:b0b94a7b7c1f |
|
17-Mar-2011 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: Detect and skip udelay() functions in linux kernel.
This change speeds up booting, especially in MP cases, by not executing udelay() on the core but instead skipping ahead tha amount of time that is being delayed.
|
#
7733:08d6a773d1b6 |
|
08-Nov-2010 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: Add checkpointing support
|
#
7585:afbc40280b56 |
|
23-Aug-2010 |
Ali Saidi <Ali.Saidi@arm.com> |
ARM: Add system for ARM/Linux and bootstrapping
|