Searched refs:index (Results 26 - 50 of 275) sorted by relevance

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/gem5/ext/googletest/googletest/src/
H A Dgtest-test-part.cc72 // Returns the TestPartResult at the given index (0-based).
73 const TestPartResult& TestPartResultArray::GetTestPartResult(int index) const {
74 if (index < 0 || index >= size()) {
75 printf("\nInvalid index (%d) into TestPartResultArray.\n", index);
79 return array_[index];
/gem5/src/arch/x86/
H A Dmmapped_ipr.hh64 MiscRegIndex index = (MiscRegIndex)( local
66 RegVal data = htog(xc->readMiscReg(index));
81 MiscRegIndex index = (MiscRegIndex)( local
83 RegVal data = htog(xc->readMiscRegNoEffect(index));
87 xc->setMiscReg(index, gtoh(data));
H A Demulenv.hh56 RegIndex index; member in struct:X86ISA::EmulEnv
65 scale(0), index(NUM_INTREGS),
H A Disa.hh78 return RegId(IntRegClass, flattenIntIndex(regId.index()));
80 return RegId(FloatRegClass, flattenFloatIndex(regId.index()));
82 return RegId(CCRegClass, flattenCCIndex(regId.index()));
84 return RegId(MiscRegClass, flattenMiscIndex(regId.index()));
/gem5/src/systemc/tlm_core/2/generic_payload/
H A Dgp.cc301 tlm_generic_payload::set_extension(unsigned int index, tlm_extension_base *ext) argument
303 sc_assert(index < m_extensions.size());
304 tlm_extension_base *tmp = m_extensions[index];
305 m_extensions[index] = ext;
311 unsigned int index, tlm_extension_base *ext)
313 sc_assert(index < m_extensions.size());
314 tlm_extension_base *tmp = m_extensions[index];
315 m_extensions[index] = ext;
317 m_extensions.insert_in_cache(&m_extensions[index]);
323 tlm_generic_payload::get_extension(unsigned int index) cons
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/gem5/ext/systemc/src/sysc/utils/
H A Dsc_string.h137 // returns character at "index" position
139 char operator[](int index) const;
143 char& operator[](int index);
160 int index; local
165 index = temp.pos("%");
166 if(index == last_char)
168 temp = substr(index,last_char);
171 temp = to_string(substr(0,index+f_len-1).c_str(),t);
172 return (*this) = temp + substr(index+f_len,last_char);
181 // remove "count" characters from "index"
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/gem5/src/arch/x86/insts/
H A Dmicrofpop.hh69 src1(_src1.index()), src2(_src2.index()), dest(_dest.index()),
/gem5/src/systemc/utils/
H A Dsc_vector.cc75 sc_vector_base::checkIndex(size_type index) const
77 if (index >= size()) {
79 ccprintf(ss, "%s[%d] >= size() = %d", name(), index, size());
/gem5/src/arch/riscv/
H A Dutility.hh140 if (reg.index() >= NumIntArchRegs) {
151 str << "?? (x" << reg.index() << ')';
154 return IntRegNames[reg.index()];
156 if (reg.index() >= NumFloatRegs) {
158 str << "?? (f" << reg.index() << ')';
161 return FloatRegNames[reg.index()];
/gem5/src/sim/
H A Darguments.hh113 const Arguments &operator+=(int index) { argument
114 number += index;
119 const Arguments &operator-=(int index) { argument
120 number -= index;
125 Arguments operator[](int index) { argument
126 return Arguments(tc, index);
/gem5/src/cpu/
H A DTimingExpr.py73 # index = Param.Unsigned("index into inst src regs")
74 index = Param.Unsigned("index into inst src regs") variable in class:TimingExprSrcReg
76 def set_params(self, index):
77 self.index = index
85 reg = Param.TimingExpr("register raw index to read")
109 index = Param.Unsigned("expression index") variable in class:TimingExprRef
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/gem5/src/arch/power/
H A Dinterrupts.hh67 post(int int_num, int index) argument
73 clear(int int_num, int index) argument
/gem5/src/python/m5/util/
H A Dsorteddict.py50 index = self._left_ge(self, key)
51 if self._keys[index] != key:
53 return index
56 index = self._right_le(self, key)
57 if self._keys[index] != key:
59 return index
62 index = bisect_left(self._keys, key)
63 if index:
64 return index - 1
68 index
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/gem5/src/dev/sparc/
H A Diob.cc98 int index = (accessAddr - IntManAddr) >> 3; local
99 uint64_t data = intMan[index].cpu << 8 | intMan[index].vector << 0;
105 int index = (accessAddr - IntCtlAddr) >> 3; local
106 uint64_t data = intCtl[index].mask ? 1 << 2 : 0 |
107 intCtl[index].pend ? 1 << 0 : 0;
125 int index; local
132 index = (accessAddr - JIntData0Addr) >> 3;
133 pkt->setBE(jBusData0[index]);
138 index
189 int index; local
241 int index; local
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/gem5/src/cpu/o3/
H A Dthread_context.hh194 reg_idx)).index());
200 reg_idx)).index());
207 reg_idx)).index());
213 return readVecRegFlat(flattenRegId(id).index());
222 return getWritableVecRegFlat(flattenRegId(id).index());
231 return readVecLaneFlat<uint8_t>(flattenRegId(id).index(),
239 return readVecLaneFlat<uint16_t>(flattenRegId(id).index(),
247 return readVecLaneFlat<uint32_t>(flattenRegId(id).index(),
255 return readVecLaneFlat<uint64_t>(flattenRegId(id).index(),
264 return setVecLaneFlat(flattenRegId(reg).index(), re
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H A Dstore_set.cc211 int index = calcIndex(store_PC);
216 assert(index < SSITSize);
218 if (!validSSIT[index]) {
222 store_SSID = SSIT[index];
241 int index = calcIndex(PC);
245 assert(index < SSITSize);
247 if (!validSSIT[index]) {
248 DPRINTF(StoreSet, "Inst %#x with index %i had no SSID\n",
249 PC, index);
254 inst_SSID = SSIT[index];
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/gem5/configs/common/
H A DGPUTLBConfig.py152 for index in range(TLB_type['width']):
155 (name, index, name, index))
176 for index in range(TLB_type['width']):
179 (dispatcher_idx, index))
181 for index in range(n_cu):
182 sqc_tlb_index = index / options.cu_per_sqc
183 sqc_tlb_port_id = index % options.cu_per_sqc
186 (shader_idx, index, sqc_tlb_index, sqc_tlb_port_id))
196 for index i
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/gem5/src/arch/arm/insts/
H A Dneon64_mem.hh60 writeVecElem(VReg *dest, XReg src, int index, int eSize) argument
70 int lsbPos = index * eBits;
94 readVecElem(VReg src, int index, int eSize)
106 int lsbPos = index * eBits;
/gem5/util/systemc/systemc_within_gem5/systemc_simple_object/
H A Dfeeder.hh60 int index; member in class:Feeder
/gem5/src/mem/cache/prefetch/
H A Dindirect_memory.hh81 /** Current index value */
82 int64_t index; member in struct:IndirectMemoryPrefetcher::PrefetchTableEntry
91 * match with the current index value. This information is later used
92 * when a new index is updated. If there were no increases in the
99 enabled(false), index(0), baseAddr(0), shift(0),
109 index = 0;
122 /** First index */
124 /** Second index */
126 /** Valid bit for the second index */
163 * @param index Detecte
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/gem5/src/arch/alpha/
H A Dinterrupts.hh84 post(int int_num, int index) argument
86 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
91 if (index < 0 || index >= (int)sizeof(uint64_t) * 8)
94 interrupts[int_num] |= 1 << index;
99 clear(int int_num, int index) argument
101 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
106 if (index < 0 || index >= (int)sizeof(uint64_t) * 8)
109 interrupts[int_num] &= ~(1 << index);
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/gem5/src/systemc/tlm_utils/
H A Dinstance_specific_extensions.cc223 // non-templatized version with manual index:
226 unsigned int index, ispex_base *ext)
229 ispex_base *tmp = m_extensions[index];
230 m_extensions[index] = ext;
238 unsigned int index) const
240 return (index < m_extensions.size()) ? m_extensions[index] : nullptr;
244 instance_specific_extensions_per_accessor::clear_extension(unsigned int index) argument
246 if (index < m_extensions.size()) {
247 if (m_extensions[index])
225 set_extension( unsigned int index, ispex_base *ext) argument
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/gem5/src/arch/sparc/
H A Dinterrupts.hh102 post(int int_num, int index) argument
104 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
106 assert(index >= 0 && index < 64);
108 interrupts[int_num] |= ULL(1) << index;
113 clear(int int_num, int index) argument
115 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
117 assert(index >= 0 && index < 64);
119 interrupts[int_num] &= ~(ULL(1) << index);
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/gem5/src/mem/ruby/common/
H A DHistogram.cc97 uint32_t index; local
102 index = 0;
104 index = floorLog2(value) + 1;
105 if (index >= m_data.size()) {
106 index = m_data.size() - 1;
114 index = value/m_binsize;
117 assert(index < m_data.size());
118 m_data[index]++;
119 m_largest_bin = max(m_largest_bin, index);
149 add(1<<(i-1)); // account for the + 1 index
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/gem5/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/
H A Dmixed_child_procs.cpp49 , index(0)
78 t = sc_spawn(sc_bind(&Top::child_thread, this, index++, 3));
79 m = sc_spawn(sc_bind(&Top::child_method, this, index++, 3), "m", &opt);
86 int index; member in struct:Top
130 sc_spawn(sc_bind(&Top::child_thread, this, index++, level-1));
131 sc_spawn(sc_bind(&Top::child_method, this, index++, level-1), "h", &opt);
169 sc_spawn(sc_bind(&Top::child_thread, this, index++, level-1));
170 sc_spawn(sc_bind(&Top::child_method, this, index++, level-1), "m", &opt);
195 sc_assert( top.index == top.n );

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