112647Santhony.gutierrez@amd.com# Copyright (c) 2011-2015 Advanced Micro Devices, Inc. 212647Santhony.gutierrez@amd.com# All rights reserved. 311308Santhony.gutierrez@amd.com# 412647Santhony.gutierrez@amd.com# For use for simulation and test purposes only 511308Santhony.gutierrez@amd.com# 612647Santhony.gutierrez@amd.com# Redistribution and use in source and binary forms, with or without 712647Santhony.gutierrez@amd.com# modification, are permitted provided that the following conditions are met: 811308Santhony.gutierrez@amd.com# 912647Santhony.gutierrez@amd.com# 1. Redistributions of source code must retain the above copyright notice, 1012647Santhony.gutierrez@amd.com# this list of conditions and the following disclaimer. 1111308Santhony.gutierrez@amd.com# 1212647Santhony.gutierrez@amd.com# 2. Redistributions in binary form must reproduce the above copyright notice, 1312647Santhony.gutierrez@amd.com# this list of conditions and the following disclaimer in the documentation 1412647Santhony.gutierrez@amd.com# and/or other materials provided with the distribution. 1511308Santhony.gutierrez@amd.com# 1612647Santhony.gutierrez@amd.com# 3. Neither the name of the copyright holder nor the names of its 1712647Santhony.gutierrez@amd.com# contributors may be used to endorse or promote products derived from this 1812647Santhony.gutierrez@amd.com# software without specific prior written permission. 1911308Santhony.gutierrez@amd.com# 2012647Santhony.gutierrez@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 2112647Santhony.gutierrez@amd.com# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2212647Santhony.gutierrez@amd.com# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2312647Santhony.gutierrez@amd.com# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 2412647Santhony.gutierrez@amd.com# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2512647Santhony.gutierrez@amd.com# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2612647Santhony.gutierrez@amd.com# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2712647Santhony.gutierrez@amd.com# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2812647Santhony.gutierrez@amd.com# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2912647Santhony.gutierrez@amd.com# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3012647Santhony.gutierrez@amd.com# POSSIBILITY OF SUCH DAMAGE. 3111308Santhony.gutierrez@amd.com# 3212647Santhony.gutierrez@amd.com# Authors: Lisa Hsu 3311308Santhony.gutierrez@amd.com 3412564Sgabeblack@google.comfrom __future__ import print_function 3513774Sandreas.sandberg@arm.comfrom __future__ import absolute_import 3612564Sgabeblack@google.com 3711308Santhony.gutierrez@amd.com# Configure the TLB hierarchy 3811308Santhony.gutierrez@amd.com# Places which would probably need to be modified if you 3911308Santhony.gutierrez@amd.com# want a different hierarchy are specified by a <Modify here .. >' 4011308Santhony.gutierrez@amd.com# comment 4111308Santhony.gutierrez@amd.comimport m5 4211308Santhony.gutierrez@amd.comfrom m5.objects import * 4311308Santhony.gutierrez@amd.com 4411308Santhony.gutierrez@amd.comdef TLB_constructor(level): 4511308Santhony.gutierrez@amd.com 4611308Santhony.gutierrez@amd.com constructor_call = "X86GPUTLB(size = options.L%(level)dTLBentries, \ 4711308Santhony.gutierrez@amd.com assoc = options.L%(level)dTLBassoc, \ 4811308Santhony.gutierrez@amd.com hitLatency = options.L%(level)dAccessLatency,\ 4911308Santhony.gutierrez@amd.com missLatency2 = options.L%(level)dMissLatency,\ 5011308Santhony.gutierrez@amd.com maxOutstandingReqs = options.L%(level)dMaxOutstandingReqs,\ 5111308Santhony.gutierrez@amd.com accessDistance = options.L%(level)dAccessDistanceStat,\ 5211308Santhony.gutierrez@amd.com clk_domain = SrcClockDomain(\ 5311308Santhony.gutierrez@amd.com clock = options.GPUClock,\ 5411308Santhony.gutierrez@amd.com voltage_domain = VoltageDomain(\ 5511308Santhony.gutierrez@amd.com voltage = options.gpu_voltage)))" % locals() 5611308Santhony.gutierrez@amd.com return constructor_call 5711308Santhony.gutierrez@amd.com 5811308Santhony.gutierrez@amd.comdef Coalescer_constructor(level): 5911308Santhony.gutierrez@amd.com 6011308Santhony.gutierrez@amd.com constructor_call = "TLBCoalescer(probesPerCycle = \ 6111308Santhony.gutierrez@amd.com options.L%(level)dProbesPerCycle, \ 6211308Santhony.gutierrez@amd.com coalescingWindow = options.L%(level)dCoalescingWindow,\ 6311308Santhony.gutierrez@amd.com disableCoalescing = options.L%(level)dDisableCoalescing,\ 6411308Santhony.gutierrez@amd.com clk_domain = SrcClockDomain(\ 6511308Santhony.gutierrez@amd.com clock = options.GPUClock,\ 6611308Santhony.gutierrez@amd.com voltage_domain = VoltageDomain(\ 6711308Santhony.gutierrez@amd.com voltage = options.gpu_voltage)))" % locals() 6811308Santhony.gutierrez@amd.com return constructor_call 6911308Santhony.gutierrez@amd.com 7011308Santhony.gutierrez@amd.comdef create_TLB_Coalescer(options, my_level, my_index, TLB_name, Coalescer_name): 7111308Santhony.gutierrez@amd.com # arguments: options, TLB level, number of private structures for this Level, 7211308Santhony.gutierrez@amd.com # TLB name and Coalescer name 7313731Sandreas.sandberg@arm.com for i in range(my_index): 7411308Santhony.gutierrez@amd.com TLB_name.append(eval(TLB_constructor(my_level))) 7511308Santhony.gutierrez@amd.com Coalescer_name.append(eval(Coalescer_constructor(my_level))) 7611308Santhony.gutierrez@amd.com 7711308Santhony.gutierrez@amd.comdef config_tlb_hierarchy(options, system, shader_idx): 7811308Santhony.gutierrez@amd.com n_cu = options.num_compute_units 7911308Santhony.gutierrez@amd.com # Make this configurable now, instead of the hard coded val. The dispatcher 8011308Santhony.gutierrez@amd.com # is always the last item in the system.cpu list. 8111308Santhony.gutierrez@amd.com dispatcher_idx = len(system.cpu) - 1 8211308Santhony.gutierrez@amd.com 8311308Santhony.gutierrez@amd.com if options.TLB_config == "perLane": 8411308Santhony.gutierrez@amd.com num_TLBs = 64 * n_cu 8511308Santhony.gutierrez@amd.com elif options.TLB_config == "mono": 8611308Santhony.gutierrez@amd.com num_TLBs = 1 8711308Santhony.gutierrez@amd.com elif options.TLB_config == "perCU": 8811308Santhony.gutierrez@amd.com num_TLBs = n_cu 8911308Santhony.gutierrez@amd.com elif options.TLB_config == "2CU": 9011308Santhony.gutierrez@amd.com num_TLBs = n_cu >> 1 9111308Santhony.gutierrez@amd.com else: 9212564Sgabeblack@google.com print("Bad option for TLB Configuration.") 9311308Santhony.gutierrez@amd.com sys.exit(1) 9411308Santhony.gutierrez@amd.com 9511308Santhony.gutierrez@amd.com #---------------------------------------------------------------------------------------- 9611308Santhony.gutierrez@amd.com # A visual representation of the TLB hierarchy 9711308Santhony.gutierrez@amd.com # for ease of configuration 9811308Santhony.gutierrez@amd.com # < Modify here the width and the number of levels if you want a different configuration > 9911308Santhony.gutierrez@amd.com # width is the number of TLBs of the given type (i.e., D-TLB, I-TLB etc) for this level 10011308Santhony.gutierrez@amd.com L1 = [{'name': 'sqc', 'width': options.num_sqc, 'TLBarray': [], 'CoalescerArray': []}, 10111308Santhony.gutierrez@amd.com {'name': 'dispatcher', 'width': 1, 'TLBarray': [], 'CoalescerArray': []}, 10211308Santhony.gutierrez@amd.com {'name': 'l1', 'width': num_TLBs, 'TLBarray': [], 'CoalescerArray': []}] 10311308Santhony.gutierrez@amd.com 10411308Santhony.gutierrez@amd.com L2 = [{'name': 'l2', 'width': 1, 'TLBarray': [], 'CoalescerArray': []}] 10511308Santhony.gutierrez@amd.com L3 = [{'name': 'l3', 'width': 1, 'TLBarray': [], 'CoalescerArray': []}] 10611308Santhony.gutierrez@amd.com 10711308Santhony.gutierrez@amd.com TLB_hierarchy = [L1, L2, L3] 10811308Santhony.gutierrez@amd.com 10911308Santhony.gutierrez@amd.com #---------------------------------------------------------------------------------------- 11011308Santhony.gutierrez@amd.com # Create the hiearchy 11111308Santhony.gutierrez@amd.com # Call the appropriate constructors and add objects to the system 11211308Santhony.gutierrez@amd.com 11313731Sandreas.sandberg@arm.com for i in range(len(TLB_hierarchy)): 11411308Santhony.gutierrez@amd.com hierarchy_level = TLB_hierarchy[i] 11511308Santhony.gutierrez@amd.com level = i+1 11611308Santhony.gutierrez@amd.com for TLB_type in hierarchy_level: 11711308Santhony.gutierrez@amd.com TLB_index = TLB_type['width'] 11811308Santhony.gutierrez@amd.com TLB_array = TLB_type['TLBarray'] 11911308Santhony.gutierrez@amd.com Coalescer_array = TLB_type['CoalescerArray'] 12011308Santhony.gutierrez@amd.com # If the sim calls for a fixed L1 TLB size across CUs, 12111308Santhony.gutierrez@amd.com # override the TLB entries option 12211308Santhony.gutierrez@amd.com if options.tot_L1TLB_size: 12311308Santhony.gutierrez@amd.com options.L1TLBentries = options.tot_L1TLB_size / num_TLBs 12411308Santhony.gutierrez@amd.com if options.L1TLBassoc > options.L1TLBentries: 12511308Santhony.gutierrez@amd.com options.L1TLBassoc = options.L1TLBentries 12611308Santhony.gutierrez@amd.com # call the constructors for the TLB and the Coalescer 12711308Santhony.gutierrez@amd.com create_TLB_Coalescer(options, level, TLB_index,\ 12811308Santhony.gutierrez@amd.com TLB_array, Coalescer_array) 12911308Santhony.gutierrez@amd.com 13011308Santhony.gutierrez@amd.com system_TLB_name = TLB_type['name'] + '_tlb' 13111308Santhony.gutierrez@amd.com system_Coalescer_name = TLB_type['name'] + '_coalescer' 13211308Santhony.gutierrez@amd.com 13311308Santhony.gutierrez@amd.com # add the different TLB levels to the system 13411308Santhony.gutierrez@amd.com # Modify here if you want to make the TLB hierarchy a child of 13511308Santhony.gutierrez@amd.com # the shader. 13611308Santhony.gutierrez@amd.com exec('system.%s = TLB_array' % system_TLB_name) 13711308Santhony.gutierrez@amd.com exec('system.%s = Coalescer_array' % system_Coalescer_name) 13811308Santhony.gutierrez@amd.com 13911308Santhony.gutierrez@amd.com #=========================================================== 14011308Santhony.gutierrez@amd.com # Specify the TLB hierarchy (i.e., port connections) 14111308Santhony.gutierrez@amd.com # All TLBs but the last level TLB need to have a memSidePort (master) 14211308Santhony.gutierrez@amd.com #=========================================================== 14311308Santhony.gutierrez@amd.com 14411308Santhony.gutierrez@amd.com # Each TLB is connected with its Coalescer through a single port. 14511308Santhony.gutierrez@amd.com # There is a one-to-one mapping of TLBs to Coalescers at a given level 14611308Santhony.gutierrez@amd.com # This won't be modified no matter what the hierarchy looks like. 14713731Sandreas.sandberg@arm.com for i in range(len(TLB_hierarchy)): 14811308Santhony.gutierrez@amd.com hierarchy_level = TLB_hierarchy[i] 14911308Santhony.gutierrez@amd.com level = i+1 15011308Santhony.gutierrez@amd.com for TLB_type in hierarchy_level: 15111308Santhony.gutierrez@amd.com name = TLB_type['name'] 15211308Santhony.gutierrez@amd.com for index in range(TLB_type['width']): 15311308Santhony.gutierrez@amd.com exec('system.%s_coalescer[%d].master[0] = \ 15411308Santhony.gutierrez@amd.com system.%s_tlb[%d].slave[0]' % \ 15511308Santhony.gutierrez@amd.com (name, index, name, index)) 15611308Santhony.gutierrez@amd.com 15711308Santhony.gutierrez@amd.com # Connect the cpuSidePort (slave) of all the coalescers in level 1 15811308Santhony.gutierrez@amd.com # < Modify here if you want a different configuration > 15911308Santhony.gutierrez@amd.com for TLB_type in L1: 16011308Santhony.gutierrez@amd.com name = TLB_type['name'] 16111308Santhony.gutierrez@amd.com num_TLBs = TLB_type['width'] 16211308Santhony.gutierrez@amd.com if name == 'l1': # L1 D-TLBs 16313731Sandreas.sandberg@arm.com tlb_per_cu = num_TLBs // n_cu 16411308Santhony.gutierrez@amd.com for cu_idx in range(n_cu): 16511308Santhony.gutierrez@amd.com if tlb_per_cu: 16611308Santhony.gutierrez@amd.com for tlb in range(tlb_per_cu): 16711308Santhony.gutierrez@amd.com exec('system.cpu[%d].CUs[%d].translation_port[%d] = \ 16811308Santhony.gutierrez@amd.com system.l1_coalescer[%d].slave[%d]' % \ 16911308Santhony.gutierrez@amd.com (shader_idx, cu_idx, tlb, cu_idx*tlb_per_cu+tlb, 0)) 17011308Santhony.gutierrez@amd.com else: 17111308Santhony.gutierrez@amd.com exec('system.cpu[%d].CUs[%d].translation_port[%d] = \ 17211308Santhony.gutierrez@amd.com system.l1_coalescer[%d].slave[%d]' % \ 17311308Santhony.gutierrez@amd.com (shader_idx, cu_idx, tlb_per_cu, cu_idx / (n_cu / num_TLBs), cu_idx % (n_cu / num_TLBs))) 17411308Santhony.gutierrez@amd.com 17511308Santhony.gutierrez@amd.com elif name == 'dispatcher': # Dispatcher TLB 17611308Santhony.gutierrez@amd.com for index in range(TLB_type['width']): 17711308Santhony.gutierrez@amd.com exec('system.cpu[%d].translation_port = \ 17811308Santhony.gutierrez@amd.com system.dispatcher_coalescer[%d].slave[0]' % \ 17911308Santhony.gutierrez@amd.com (dispatcher_idx, index)) 18011308Santhony.gutierrez@amd.com elif name == 'sqc': # I-TLB 18111308Santhony.gutierrez@amd.com for index in range(n_cu): 18211308Santhony.gutierrez@amd.com sqc_tlb_index = index / options.cu_per_sqc 18311308Santhony.gutierrez@amd.com sqc_tlb_port_id = index % options.cu_per_sqc 18411308Santhony.gutierrez@amd.com exec('system.cpu[%d].CUs[%d].sqc_tlb_port = \ 18511308Santhony.gutierrez@amd.com system.sqc_coalescer[%d].slave[%d]' % \ 18611308Santhony.gutierrez@amd.com (shader_idx, index, sqc_tlb_index, sqc_tlb_port_id)) 18711308Santhony.gutierrez@amd.com 18811308Santhony.gutierrez@amd.com 18911308Santhony.gutierrez@amd.com # Connect the memSidePorts (masters) of all the TLBs with the 19011308Santhony.gutierrez@amd.com # cpuSidePorts (slaves) of the Coalescers of the next level 19111308Santhony.gutierrez@amd.com # < Modify here if you want a different configuration > 19211308Santhony.gutierrez@amd.com # L1 <-> L2 19311308Santhony.gutierrez@amd.com l2_coalescer_index = 0 19411308Santhony.gutierrez@amd.com for TLB_type in L1: 19511308Santhony.gutierrez@amd.com name = TLB_type['name'] 19611308Santhony.gutierrez@amd.com for index in range(TLB_type['width']): 19711308Santhony.gutierrez@amd.com exec('system.%s_tlb[%d].master[0] = \ 19811308Santhony.gutierrez@amd.com system.l2_coalescer[0].slave[%d]' % \ 19911308Santhony.gutierrez@amd.com (name, index, l2_coalescer_index)) 20011308Santhony.gutierrez@amd.com l2_coalescer_index += 1 20111308Santhony.gutierrez@amd.com # L2 <-> L3 20211308Santhony.gutierrez@amd.com system.l2_tlb[0].master[0] = system.l3_coalescer[0].slave[0] 20311308Santhony.gutierrez@amd.com 20411308Santhony.gutierrez@amd.com return system 205