| /gem5/src/cpu/ |
| H A D | base.cc | 337 Fault fault = dtb->translateAtomic(req, tc, BaseTLB::Read);
338 assert(fault == NoFault);
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| /gem5/src/cpu/o3/ |
| H A D | lsq.hh | 731 virtual void finish(const Fault &fault, const RequestPtr &req,
803 virtual void finish(const Fault &fault, const RequestPtr &req,
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| H A D | cpu.cc | 912 FullO3CPU<Impl>::trap(const Fault &fault, ThreadID tid, argument
916 fault->invoke(this->threadContexts[tid], inst);
921 FullO3CPU<Impl>::syscall(int64_t callnum, ThreadID tid, Fault *fault) argument
932 this->thread[tid]->syscall(callnum, fault);
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| H A D | lsq_unit_impl.hh | 428 ld_inst->fault = std::make_shared<ReExec>();
481 DPRINTF(LSQUnit, "Detected fault with inst [sn:%lli] "
489 "Detected fault with inst [sn:%lli] and "
508 DPRINTF(LSQUnit, "Detected fault with inst [sn:%lli] and "
516 "Detected fault with "
560 // If we have a partial fault where the mem access is not complete yet
562 // when the cache gets unblocked. We will handle the fault when the
578 (load_fault != NoFault ? "fault" : "predication"));
641 // writeback if we haven't had a fault by here.
963 if (inst->fault
[all...] |
| /gem5/src/cpu/checker/ |
| H A D | cpu.hh | 584 void syscall(int64_t callnum, Fault *fault) override { }
635 void advancePC(const Fault &fault);
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| /gem5/src/cpu/kvm/ |
| H A D | base.cc | 1129 Fault fault(tc->getDTBPtr()->finalizePhysical(mmio_req, tc, tlb_mode));
1130 if (fault != NoFault)
1131 warn("Finalization of MMIO address failed: %s\n", fault->name());
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| /gem5/src/arch/arm/tracers/ |
| H A D | tarmac_parser.cc | 1060 Fault fault = dtb->translateAtomic(req, thread, BaseTLB::Read); local
1067 if (fault == NoFault &&
1079 if (fault != NoFault) {
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| /gem5/src/arch/arm/insts/ |
| H A D | static_inst.hh | 511 annotateFault(ArmFault *fault) {} argument
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| /gem5/src/arch/sparc/ |
| H A D | process.cc | 71 SparcProcess::handleTrap(int trapNum, ThreadContext *tc, Fault *fault) argument
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| H A D | faults.cc | 536 // Probably inject a WDR fault using the interrupt mechanism.
539 // guest_watchdog fault
588 // the trap stack is the state from before this fault.
821 Fault fault; local
822 sp->handleTrap(_n, tc, &fault);
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| /gem5/src/arch/x86/ |
| H A D | process.cc | 151 I386Process::syscall(int64_t callnum, ThreadContext *tc, Fault *fault) argument
160 X86Process::syscall(callnum, tc, fault);
537 /** Page fault handler */
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| /gem5/src/arch/arm/ |
| H A D | faults.hh | 79 // This variable is true if the above fault specific informations
84 bool hypRouted; // True if the fault has been routed to Hypervisor
85 bool span; // True if the fault is setting the PSTATE.PAN bit
91 /// Generic fault source enums used to index into
123 /// Encodings of the fault sources when the short-desc. translation table
126 /// Encodings of the fault sources when the long-desc. translation table
129 /// Encodings of the fault sources in AArch64 state
209 // Returns the actual fault address register to use based on the target
412 * The virtual address the fault occured at. If 2 stages of
419 * Original virtual address. If the fault wa
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| H A D | table_walker.hh | 717 /** The fault that we are going to return */
718 Fault fault; member in class:ArmISA::TableWalker::LongDescriptor::WalkerState
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| /gem5/src/gpu-compute/ |
| H A D | gpu_tlb.cc | 803 // penalize a "page fault" more
853 // This would fault if this were a write, so return a page
854 // fault that reflects that happening.
920 Fault fault = GpuTLB::translate(req, tc, translation, mode, local
924 translation->finish(fault, req, tc, mode);
1121 * Do Paging protection checks. If we encounter a page fault, then
1143 panic("Page fault detected");
1147 // This would fault if this were a write, so return a page
1148 // fault that reflects that happening.
1149 panic("Page fault detecte
[all...] |
| /gem5/src/cpu/minor/ |
| H A D | lsq.cc | 83 Fault M5_VAR_USED fault = inst->translationFault; local
85 // Give the instruction a chance to suppress a translation fault
89 "Translation fault suppressed for inst:%s\n", *inst);
91 assert(inst->translationFault == fault);
350 /* tryToSendToTransfers will handle the fault */
1017 DPRINTF(MinorMem, "Not signalling fault for faulting prefetch\n");
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