Searched refs:curTick (Results 126 - 150 of 213) sorted by relevance

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/gem5/src/mem/ruby/system/
H A DGPUCoalescer.cc202 curTick());
325 schedule(deadlockCheckEvent, m_deadlock_threshold + curTick());
718 schedule(issueEvent, curTick());
812 schedule(issueEvent, curTick());
866 schedule(issueEvent, curTick());
944 curTick(), m_version, "Coal", "Begin", "", "",
1252 curTick(), m_version, "Coal",
/gem5/src/dev/net/
H A Dns_gige.cc778 Tick when = curTick();
840 cpuIntrPost(curTick());
857 assert(when >= curTick());
858 assert(intrTick >= curTick() || intrTick == 0);
866 if (intrTick < curTick()) {
867 intrTick = curTick();
884 assert(intrTick == curTick());
1055 if (rxKickTick > curTick()) {
1403 schedule(txEvent, curTick() + retryTime);
1481 if (txKickTick > curTick()) {
[all...]
H A Ddist_etherlink.cc206 parent->schedule(doneEvent, curTick() + delay);
H A Dethertap.cc201 schedule(txEvent, curTick() + retryTime);
223 schedule(txEvent, curTick() + retryTime);
H A Di8254xGBe.cc707 "EINT: postInterrupt() curTick(): %d itr: %d interval: %d\n",
708 curTick(), regs.itr.interval(), itr_interval);
711 lastInterrupt + itr_interval <= curTick()) {
775 lastInterrupt = curTick();
813 Tick t = curTick() + SimClock::Int::ns * 256 * regs.itr.interval();
905 igbe->schedule(wbDelayEvent, curTick() + igbe->wbDelay);
915 igbe->schedule(wbDelayEvent, curTick() + igbe->wbDelay);
986 igbe->schedule(fetchDelayEvent, curTick() + igbe->fetchDelay);
996 igbe->schedule(fetchDelayEvent, curTick() + igbe->fetchDelay);
1465 igbe->reschedule(igbe->rdtrEvent, curTick()
[all...]
/gem5/src/mem/
H A Ddram_ctrl.hh426 * curTick() to DRAMPower after sorting.
513 * or before curTick() to DRAMPower library
514 * All commands before curTick are guaranteed to be complete
606 virtual void process() { mem->lastStatsResetTick = curTick(); };
737 : entryTime(curTick()), readyTime(curTick()), pkt(_pkt),
H A Dxbar.cc101 Tick offset = clockEdge() - curTick();
155 occupancy += until - curTick();
158 curTick(), until);
H A Dexternal_slave.cc145 owner.schedule(responseEvent, curTick());
/gem5/util/tlm/src/
H A Dsim_control.cc167 std::cerr << "Exit at tick " << curTick()
/gem5/src/sim/
H A Ddvfs_handler.cc153 Tick when = curTick() + _transLatency;
H A Deventq.hh241 whenScheduled = curTick();
355 whenCreated = curTick();
/gem5/src/dev/arm/
H A Denergy_ctrl.cc197 schedule(updateAckEvent, curTick() + dvfsHandler->transLatency());
H A Dpl111.cc470 startTime = curTick();
513 if ((curTick() - startTime) > maxFrameTime) {
515 " have taken %d\n", curTick() - startTime, maxFrameTime);
543 curTick() +
/gem5/util/systemc/gem5_within_systemc/
H A Dsc_gem5_control.cc286 std::cerr << "Exit at tick " << curTick()
/gem5/configs/example/
H A Druby_mem_test.py174 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
H A Druby_gpu_random_test.py189 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
H A Dhmctest.py110 print('Exiting @ tick %i because %s (exit code is %i)' % (m5.curTick(),
H A Dgarnet_synth_traffic.py156 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
/gem5/configs/example/arm/
H A Dstarter_se.py231 print(event.getCause(), " @ ", m5.curTick())
/gem5/tests/
H A Drun.py148 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
/gem5/src/cpu/testers/traffic_gen/
H A Dbase.hh184 waitingResp[pkt->req] = curTick();
/gem5/src/arch/x86/
H A Dinterrupts.cc395 uint64_t val = apicTimerEvent.when() - curTick();
572 Tick offset = curTick() % clockPeriod();
575 curTick() + (newCount + 1) *
580 curTick() + newCount *
/gem5/src/systemc/tlm_bridge/
H A Dgem5_to_tlm.cc360 Tick nextEventTick = curTick() + delay.value();
437 Tick nextEventTick = curTick() + delay.value();
/gem5/src/learning_gem5/part2/
H A Dsimple_cache.cc226 missLatency.sample(curTick() - missTime);
297 missTime = curTick();
/gem5/src/dev/storage/
H A Dide_disk.cc354 schedule(dmaTransferEvent, curTick() + DMA_BACKOFF_PERIOD);
394 schedule(dmaReadWaitEvent, curTick() + totalDiskDelay);
450 schedule(dmaReadWaitEvent, curTick() + DMA_BACKOFF_PERIOD);
512 schedule(dmaWriteWaitEvent, curTick() + totalDiskDelay);
532 schedule(dmaWriteWaitEvent, curTick() + DMA_BACKOFF_PERIOD);
614 schedule(dmaTransferEvent, curTick() + 1);

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