1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
11# documentation and/or other materials provided with the distribution;
12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Ron Dreslinski
29#          Brad Beckmann
30
31from __future__ import print_function
32from __future__ import absolute_import
33
34import m5
35from m5.objects import *
36from m5.defines import buildEnv
37from m5.util import addToPath
38import os, optparse, sys
39
40addToPath('../')
41
42from common import Options
43from ruby import Ruby
44
45# Get paths we might need.  It's expected this file is in m5/configs/example.
46config_path = os.path.dirname(os.path.abspath(__file__))
47config_root = os.path.dirname(config_path)
48
49parser = optparse.OptionParser()
50Options.addNoISAOptions(parser)
51
52parser.add_option("--maxloads", metavar="N", default=0,
53                  help="Stop after N loads")
54parser.add_option("--progress", type="int", default=1000,
55                  metavar="NLOADS",
56                  help="Progress message interval "
57                  "[default: %default]")
58parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers")
59parser.add_option("--functional", type="int", default=0,
60                  help="percentage of accesses that should be functional")
61parser.add_option("--suppress-func-warnings", action="store_true",
62                  help="suppress warnings when functional accesses fail")
63
64#
65# Add the ruby specific and protocol specific options
66#
67Ruby.define_options(parser)
68
69exec(compile( \
70    open(os.path.join(config_root, "common", "Options.py")).read(), \
71    os.path.join(config_root, "common", "Options.py"), 'exec'))
72
73(options, args) = parser.parse_args()
74
75#
76# Set the default cache size and associativity to be very small to encourage
77# races between requests and writebacks.
78#
79options.l1d_size="256B"
80options.l1i_size="256B"
81options.l2_size="512B"
82options.l3_size="1kB"
83options.l1d_assoc=2
84options.l1i_assoc=2
85options.l2_assoc=2
86options.l3_assoc=2
87
88if args:
89     print("Error: script doesn't take any positional arguments")
90     sys.exit(1)
91
92block_size = 64
93
94if options.num_cpus > block_size:
95     print("Error: Number of testers %d limited to %d because of false sharing"
96           % (options.num_cpus, block_size))
97     sys.exit(1)
98
99#
100# Currently ruby does not support atomic or uncacheable accesses
101#
102cpus = [ MemTest(max_loads = options.maxloads,
103                 percent_functional = options.functional,
104                 percent_uncacheable = 0,
105                 progress_interval = options.progress,
106                 suppress_func_warnings = options.suppress_func_warnings) \
107         for i in range(options.num_cpus) ]
108
109system = System(cpu = cpus,
110                clk_domain = SrcClockDomain(clock = options.sys_clock),
111                mem_ranges = [AddrRange(options.mem_size)])
112
113if options.num_dmas > 0:
114    dmas = [ MemTest(max_loads = options.maxloads,
115                     percent_functional = 0,
116                     percent_uncacheable = 0,
117                     progress_interval = options.progress,
118                     suppress_func_warnings =
119                                        not options.suppress_func_warnings) \
120             for i in range(options.num_dmas) ]
121    system.dma_devices = dmas
122else:
123    dmas = []
124
125dma_ports = []
126for (i, dma) in enumerate(dmas):
127    dma_ports.append(dma.test)
128Ruby.create_system(options, False, system, dma_ports = dma_ports)
129
130# Create a top-level voltage domain and clock domain
131system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
132system.clk_domain = SrcClockDomain(clock = options.sys_clock,
133                                   voltage_domain = system.voltage_domain)
134# Create a seperate clock domain for Ruby
135system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
136                                        voltage_domain = system.voltage_domain)
137
138#
139# The tester is most effective when randomization is turned on and
140# artifical delay is randomly inserted on messages
141#
142system.ruby.randomization = True
143
144assert(len(cpus) == len(system.ruby._cpu_ports))
145
146for (i, cpu) in enumerate(cpus):
147    #
148    # Tie the cpu memtester ports to the correct system ports
149    #
150    cpu.port = system.ruby._cpu_ports[i].slave
151
152    #
153    # Since the memtester is incredibly bursty, increase the deadlock
154    # threshold to 5 million cycles
155    #
156    system.ruby._cpu_ports[i].deadlock_threshold = 5000000
157
158# -----------------------
159# run simulation
160# -----------------------
161
162root = Root( full_system = False, system = system )
163root.system.mem_mode = 'timing'
164
165# Not much point in this being higher than the L1 latency
166m5.ticks.setGlobalFrequency('1ns')
167
168# instantiate configuration
169m5.instantiate()
170
171# simulate until program terminates
172exit_event = m5.simulate(options.abs_max_tick)
173
174print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
175