1
2from __future__ import print_function
3from __future__ import absolute_import
4
5import sys
6import argparse
7import subprocess
8from pprint import pprint
9
10import m5
11from m5.objects import *
12from m5.util import *
13
14addToPath('../')
15
16from common import MemConfig
17from common import HMC
18
19
20def add_options(parser):
21    parser.add_argument("--external-memory-system", default=0, action="store",
22                        type=int, help="External memory system")
23    # TLM related options, currently optional in configs/common/MemConfig.py
24    parser.add_argument("--tlm-memory", action="store_true", help="use\
25                        external port for SystemC TLM co-simulation. Default:\
26                        no")
27    # Elastic traces related options, currently optional in
28    # configs/common/MemConfig.py
29    parser.add_argument("--elastic-trace-en", action="store_true",
30                        help="enable capture of data dependency and\
31                        instruction fetch traces using elastic trace\
32                        probe.\nDefault: no")
33    # Options related to traffic generation
34    parser.add_argument("--num-tgen", default=4, action="store", type=int,
35                        choices=[4], help="number of traffic generators.\
36                        Right now this script supports only 4.\nDefault: 4")
37    parser.add_argument("--tgen-cfg-file",
38                        default="./configs/example/hmc_tgen.cfg",
39                        type=str, help="Traffic generator(s) configuration\
40                        file. Note: this script uses the same configuration\
41                        file for all traffic generators")
42
43
44# considering 4GB HMC device with following parameters
45# hmc_device_size = '4GB'
46# hmc_vault_size = '256MB'
47# hmc_stack_size = 8
48# hmc_bank_in_stack = 2
49# hmc_bank_size = '16MB'
50# hmc_bank_in_vault = 16
51def build_system(options):
52    # create the system we are going to simulate
53    system = System()
54    # use timing mode for the interaction between master-slave ports
55    system.mem_mode = 'timing'
56    # set the clock fequency of the system
57    clk = '100GHz'
58    vd = VoltageDomain(voltage='1V')
59    system.clk_domain = SrcClockDomain(clock=clk, voltage_domain=vd)
60    # add traffic generators to the system
61    system.tgen = [TrafficGen(config_file=options.tgen_cfg_file) for i in
62                   range(options.num_tgen)]
63    # Config memory system with given HMC arch
64    MemConfig.config_mem(options, system)
65    # Connect the traffic generatiors
66    if options.arch == "distributed":
67        for i in range(options.num_tgen):
68            system.tgen[i].port = system.membus.slave
69        # connect the system port even if it is not used in this example
70        system.system_port = system.membus.slave
71    if options.arch == "mixed":
72        for i in range(int(options.num_tgen/2)):
73            system.tgen[i].port = system.membus.slave
74        hh = system.hmc_host
75        if options.enable_global_monitor:
76            system.tgen[2].port = hh.lmonitor[2].slave
77            hh.lmonitor[2].master = hh.seriallink[2].slave
78            system.tgen[3].port = hh.lmonitor[3].slave
79            hh.lmonitor[3].master = hh.seriallink[3].slave
80        else:
81            system.tgen[2].port = hh.seriallink[2].slave
82            system.tgen[3].port = hh.seriallink[3].slave
83        # connect the system port even if it is not used in this example
84        system.system_port = system.membus.slave
85    if options.arch == "same":
86        hh = system.hmc_host
87        for i in range(options.num_links_controllers):
88            if options.enable_global_monitor:
89                system.tgen[i].port = hh.lmonitor[i].slave
90            else:
91                system.tgen[i].port = hh.seriallink[i].slave
92    # set up the root SimObject
93    root = Root(full_system=False, system=system)
94    return root
95
96
97def main():
98    parser = argparse.ArgumentParser(description="Simple system using HMC as\
99                                     main memory")
100    HMC.add_options(parser)
101    add_options(parser)
102    options = parser.parse_args()
103    # build the system
104    root = build_system(options)
105    # instantiate all of the objects we've created so far
106    m5.instantiate()
107    print("Beginning simulation!")
108    event = m5.simulate(10000000000)
109    m5.stats.dump()
110    print('Exiting @ tick %i because %s (exit code is %i)' % (m5.curTick(),
111                                                              event.getCause(),
112                                                              event.getCode()))
113    print("Done")
114
115
116if __name__ == "__m5_main__":
117    main()
118