17635SBrad.Beckmann@amd.com# Copyright (c) 2006-2007 The Regents of The University of Michigan 27635SBrad.Beckmann@amd.com# Copyright (c) 2009 Advanced Micro Devices, Inc. 37635SBrad.Beckmann@amd.com# All rights reserved. 47635SBrad.Beckmann@amd.com# 57635SBrad.Beckmann@amd.com# Redistribution and use in source and binary forms, with or without 67635SBrad.Beckmann@amd.com# modification, are permitted provided that the following conditions are 77635SBrad.Beckmann@amd.com# met: redistributions of source code must retain the above copyright 87635SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer; 97635SBrad.Beckmann@amd.com# redistributions in binary form must reproduce the above copyright 107635SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer in the 117635SBrad.Beckmann@amd.com# documentation and/or other materials provided with the distribution; 127635SBrad.Beckmann@amd.com# neither the name of the copyright holders nor the names of its 137635SBrad.Beckmann@amd.com# contributors may be used to endorse or promote products derived from 147635SBrad.Beckmann@amd.com# this software without specific prior written permission. 157635SBrad.Beckmann@amd.com# 167635SBrad.Beckmann@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 177635SBrad.Beckmann@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 187635SBrad.Beckmann@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 197635SBrad.Beckmann@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 207635SBrad.Beckmann@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 217635SBrad.Beckmann@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 227635SBrad.Beckmann@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 237635SBrad.Beckmann@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 247635SBrad.Beckmann@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 257635SBrad.Beckmann@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 267635SBrad.Beckmann@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 277635SBrad.Beckmann@amd.com# 287635SBrad.Beckmann@amd.com# Authors: Ron Dreslinski 297635SBrad.Beckmann@amd.com# Brad Beckmann 307635SBrad.Beckmann@amd.com 3112564Sgabeblack@google.comfrom __future__ import print_function 3213774Sandreas.sandberg@arm.comfrom __future__ import absolute_import 3312564Sgabeblack@google.com 347635SBrad.Beckmann@amd.comimport m5 357635SBrad.Beckmann@amd.comfrom m5.objects import * 367635SBrad.Beckmann@amd.comfrom m5.defines import buildEnv 377635SBrad.Beckmann@amd.comfrom m5.util import addToPath 387635SBrad.Beckmann@amd.comimport os, optparse, sys 3911682Sandreas.hansson@arm.com 4011670Sandreas.hansson@arm.comaddToPath('../') 417635SBrad.Beckmann@amd.com 4211682Sandreas.hansson@arm.comfrom common import Options 4311670Sandreas.hansson@arm.comfrom ruby import Ruby 447635SBrad.Beckmann@amd.com 457635SBrad.Beckmann@amd.com# Get paths we might need. It's expected this file is in m5/configs/example. 467635SBrad.Beckmann@amd.comconfig_path = os.path.dirname(os.path.abspath(__file__)) 477635SBrad.Beckmann@amd.comconfig_root = os.path.dirname(config_path) 487635SBrad.Beckmann@amd.com 497635SBrad.Beckmann@amd.comparser = optparse.OptionParser() 5011688Sandreas.hansson@arm.comOptions.addNoISAOptions(parser) 517635SBrad.Beckmann@amd.com 5210083Snilay@cs.wisc.eduparser.add_option("--maxloads", metavar="N", default=0, 537635SBrad.Beckmann@amd.com help="Stop after N loads") 547635SBrad.Beckmann@amd.comparser.add_option("--progress", type="int", default=1000, 557635SBrad.Beckmann@amd.com metavar="NLOADS", 567635SBrad.Beckmann@amd.com help="Progress message interval " 577635SBrad.Beckmann@amd.com "[default: %default]") 587635SBrad.Beckmann@amd.comparser.add_option("--num-dmas", type="int", default=0, help="# of dma testers") 598436SBrad.Beckmann@amd.comparser.add_option("--functional", type="int", default=0, 608436SBrad.Beckmann@amd.com help="percentage of accesses that should be functional") 618436SBrad.Beckmann@amd.comparser.add_option("--suppress-func-warnings", action="store_true", 628436SBrad.Beckmann@amd.com help="suppress warnings when functional accesses fail") 637635SBrad.Beckmann@amd.com 647635SBrad.Beckmann@amd.com# 657635SBrad.Beckmann@amd.com# Add the ruby specific and protocol specific options 667635SBrad.Beckmann@amd.com# 677635SBrad.Beckmann@amd.comRuby.define_options(parser) 687635SBrad.Beckmann@amd.com 6913731Sandreas.sandberg@arm.comexec(compile( \ 7013731Sandreas.sandberg@arm.com open(os.path.join(config_root, "common", "Options.py")).read(), \ 7113731Sandreas.sandberg@arm.com os.path.join(config_root, "common", "Options.py"), 'exec')) 727635SBrad.Beckmann@amd.com 737635SBrad.Beckmann@amd.com(options, args) = parser.parse_args() 747635SBrad.Beckmann@amd.com 757635SBrad.Beckmann@amd.com# 767635SBrad.Beckmann@amd.com# Set the default cache size and associativity to be very small to encourage 777635SBrad.Beckmann@amd.com# races between requests and writebacks. 787635SBrad.Beckmann@amd.com# 797635SBrad.Beckmann@amd.comoptions.l1d_size="256B" 807635SBrad.Beckmann@amd.comoptions.l1i_size="256B" 817635SBrad.Beckmann@amd.comoptions.l2_size="512B" 827635SBrad.Beckmann@amd.comoptions.l3_size="1kB" 837635SBrad.Beckmann@amd.comoptions.l1d_assoc=2 847635SBrad.Beckmann@amd.comoptions.l1i_assoc=2 857635SBrad.Beckmann@amd.comoptions.l2_assoc=2 867635SBrad.Beckmann@amd.comoptions.l3_assoc=2 877635SBrad.Beckmann@amd.com 887635SBrad.Beckmann@amd.comif args: 8912564Sgabeblack@google.com print("Error: script doesn't take any positional arguments") 907635SBrad.Beckmann@amd.com sys.exit(1) 917635SBrad.Beckmann@amd.com 927635SBrad.Beckmann@amd.comblock_size = 64 937635SBrad.Beckmann@amd.com 947635SBrad.Beckmann@amd.comif options.num_cpus > block_size: 9512564Sgabeblack@google.com print("Error: Number of testers %d limited to %d because of false sharing" 9612564Sgabeblack@google.com % (options.num_cpus, block_size)) 977635SBrad.Beckmann@amd.com sys.exit(1) 987635SBrad.Beckmann@amd.com 997635SBrad.Beckmann@amd.com# 1008436SBrad.Beckmann@amd.com# Currently ruby does not support atomic or uncacheable accesses 1017635SBrad.Beckmann@amd.com# 10213408Snikos.nikoleris@arm.comcpus = [ MemTest(max_loads = options.maxloads, 1038437SBrad.Beckmann@amd.com percent_functional = options.functional, 1048437SBrad.Beckmann@amd.com percent_uncacheable = 0, 1058437SBrad.Beckmann@amd.com progress_interval = options.progress, 1068436SBrad.Beckmann@amd.com suppress_func_warnings = options.suppress_func_warnings) \ 10713731Sandreas.sandberg@arm.com for i in range(options.num_cpus) ] 1087635SBrad.Beckmann@amd.com 1097635SBrad.Beckmann@amd.comsystem = System(cpu = cpus, 1109909Snilay@cs.wisc.edu clk_domain = SrcClockDomain(clock = options.sys_clock), 1119909Snilay@cs.wisc.edu mem_ranges = [AddrRange(options.mem_size)]) 1127635SBrad.Beckmann@amd.com 1137635SBrad.Beckmann@amd.comif options.num_dmas > 0: 11413408Snikos.nikoleris@arm.com dmas = [ MemTest(max_loads = options.maxloads, 1158437SBrad.Beckmann@amd.com percent_functional = 0, 1168437SBrad.Beckmann@amd.com percent_uncacheable = 0, 1178437SBrad.Beckmann@amd.com progress_interval = options.progress, 1188929Snilay@cs.wisc.edu suppress_func_warnings = 1198929Snilay@cs.wisc.edu not options.suppress_func_warnings) \ 12013731Sandreas.sandberg@arm.com for i in range(options.num_dmas) ] 1217635SBrad.Beckmann@amd.com system.dma_devices = dmas 1227635SBrad.Beckmann@amd.comelse: 1237635SBrad.Beckmann@amd.com dmas = [] 1247635SBrad.Beckmann@amd.com 1258929Snilay@cs.wisc.edudma_ports = [] 1268929Snilay@cs.wisc.edufor (i, dma) in enumerate(dmas): 1278929Snilay@cs.wisc.edu dma_ports.append(dma.test) 12810519Snilay@cs.wisc.eduRuby.create_system(options, False, system, dma_ports = dma_ports) 1297635SBrad.Beckmann@amd.com 1309909Snilay@cs.wisc.edu# Create a top-level voltage domain and clock domain 1319909Snilay@cs.wisc.edusystem.voltage_domain = VoltageDomain(voltage = options.sys_voltage) 1329909Snilay@cs.wisc.edusystem.clk_domain = SrcClockDomain(clock = options.sys_clock, 1339909Snilay@cs.wisc.edu voltage_domain = system.voltage_domain) 1349793Sakash.bagdia@arm.com# Create a seperate clock domain for Ruby 1359909Snilay@cs.wisc.edusystem.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, 1369909Snilay@cs.wisc.edu voltage_domain = system.voltage_domain) 1379793Sakash.bagdia@arm.com 1387635SBrad.Beckmann@amd.com# 1397635SBrad.Beckmann@amd.com# The tester is most effective when randomization is turned on and 1407635SBrad.Beckmann@amd.com# artifical delay is randomly inserted on messages 1417635SBrad.Beckmann@amd.com# 1427635SBrad.Beckmann@amd.comsystem.ruby.randomization = True 14311320Ssteve.reinhardt@amd.com 14410120Snilay@cs.wisc.eduassert(len(cpus) == len(system.ruby._cpu_ports)) 1457635SBrad.Beckmann@amd.com 1467635SBrad.Beckmann@amd.comfor (i, cpu) in enumerate(cpus): 1477635SBrad.Beckmann@amd.com # 1487635SBrad.Beckmann@amd.com # Tie the cpu memtester ports to the correct system ports 1497635SBrad.Beckmann@amd.com # 15013408Snikos.nikoleris@arm.com cpu.port = system.ruby._cpu_ports[i].slave 1517635SBrad.Beckmann@amd.com 1527938SBrad.Beckmann@amd.com # 1537938SBrad.Beckmann@amd.com # Since the memtester is incredibly bursty, increase the deadlock 1547938SBrad.Beckmann@amd.com # threshold to 5 million cycles 1557938SBrad.Beckmann@amd.com # 15610120Snilay@cs.wisc.edu system.ruby._cpu_ports[i].deadlock_threshold = 5000000 1577938SBrad.Beckmann@amd.com 1587635SBrad.Beckmann@amd.com# ----------------------- 1597635SBrad.Beckmann@amd.com# run simulation 1607635SBrad.Beckmann@amd.com# ----------------------- 1617635SBrad.Beckmann@amd.com 1628801Sgblack@eecs.umich.eduroot = Root( full_system = False, system = system ) 1637635SBrad.Beckmann@amd.comroot.system.mem_mode = 'timing' 1647635SBrad.Beckmann@amd.com 1657635SBrad.Beckmann@amd.com# Not much point in this being higher than the L1 latency 1667635SBrad.Beckmann@amd.comm5.ticks.setGlobalFrequency('1ns') 1677635SBrad.Beckmann@amd.com 1687635SBrad.Beckmann@amd.com# instantiate configuration 1697635SBrad.Beckmann@amd.comm5.instantiate() 1707635SBrad.Beckmann@amd.com 1717635SBrad.Beckmann@amd.com# simulate until program terminates 1729909Snilay@cs.wisc.eduexit_event = m5.simulate(options.abs_max_tick) 1737635SBrad.Beckmann@amd.com 17412564Sgabeblack@google.comprint('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()) 175