/gem5/src/mem/ruby/system/ |
H A D | WeightedLRUPolicy.hh | 52 void touch(int64_t set, int64_t way, Tick time) override; 53 void touch(int64_t set, int64_t way, Tick time, int occupancy);
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/gem5/src/mem/cache/prefetch/ |
H A D | sbooe.hh | 65 std::unordered_map<Addr, Tick> demandAddresses; 73 std::deque<Tick> latencyBuffer; 76 Tick averageAccessLatency; 79 Tick latencyBufferSum; 84 /** Tick when the simulated prefetch is expected to be filled */ 85 Tick expectedArrivalTick; 119 * @param tick Tick in which the access is expected to be filled 121 void insert(Addr line, Tick tick);
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/gem5/src/sim/ |
H A D | sim_events.hh | 60 Tick repeat; 63 GlobalSimLoopExitEvent(Tick when, const std::string &_cause, int c, 64 Tick repeat = 0); 65 GlobalSimLoopExitEvent(const std::string &_cause, int c, Tick repeat = 0); 81 Tick repeat; 85 LocalSimLoopExitEvent(const std::string &_cause, int c, Tick repeat = 0);
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H A D | stat_control.cc | 72 Tick startTick; 95 Tick 101 Tick 221 Tick repeat; 224 StatEvent(Tick _when, bool _dump, bool _reset, Tick _repeat) 248 schedStatEvent(bool dump, bool reset, Tick when, Tick repeat) 258 periodicStatDump(Tick period) 280 schedStatEvent(true, true, (Tick)perio [all...] |
H A D | sim_events.cc | 57 GlobalSimLoopExitEvent::GlobalSimLoopExitEvent(Tick when, 59 int c, Tick r) 66 int c, Tick r) 90 exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, 101 exitSimLoopNow(const std::string &message, int exit_code, Tick repeat, 108 Tick r)
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H A D | clocked_object.hh | 71 mutable Tick tick; 179 Tick 216 Tick nextCycle() const { return clockEdge(Cycles(1)); } 220 Tick clockPeriod() const { return clockDomain.clockPeriod(); } 225 ticksToCycles(Tick t) const 230 Tick cyclesToTicks(Cycles c) const { return clockPeriod() * c; } 280 Tick prvEvalTick;
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H A D | clock_domain.hh | 89 Tick _clockPeriod; 123 Tick clockPeriod() const { return _clockPeriod; } 183 void clockPeriod(Tick clock_period); 232 Tick clkPeriodAtPerfLevel() const { return freqOpPoints[perfLevel()]; } 234 Tick clkPeriodAtPerfLevel(PerfLevel perf_level) const 257 const std::vector<Tick> freqOpPoints;
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/gem5/src/dev/ |
H A D | io_device.hh | 69 Tick 74 Tick receive_delay = pkt->headerDelay + pkt->payloadDelay; 77 const Tick delay = 124 virtual Tick read(PacketPtr pkt) = 0; 131 virtual Tick write(PacketPtr pkt) = 0; 163 Tick pioDelay;
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/gem5/src/cpu/kvm/ |
H A D | x86_cpu.hh | 64 Tick kvmRun(Tick ticks) override; 81 Tick kvmRunDrain() override; 84 Tick kvmRunWrapper(Tick ticks); 146 Tick handleKvmExitIO() override; 148 Tick handleKvmExitIRQWindowOpen() override;
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/gem5/src/gpu-compute/ |
H A D | shader.hh | 81 Tick clock; 89 Tick frequency() const { return SimClock::Frequency / clock; } 91 Tick ticks(int numCycles) const { return (Tick)clock * numCycles; } 93 Tick getClock() const { return clock; } 94 Tick curCycle() const { return curTick() / clock; } 95 Tick tickToCycles(Tick val) const { return val / clock;} 168 void ScheduleAdd(uint32_t *val, Tick when, int x);
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/gem5/src/mem/qos/ |
H A D | mem_sink.hh | 92 Tick recvAtomic(PacketPtr pkt); 149 const Tick requestLatency; 152 const Tick responseLatency; 173 Tick nextRequest; 224 Tick recvAtomic(PacketPtr pkt);
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/gem5/src/mem/cache/ |
H A D | noncoherent_cache.hh | 78 Tick forward_time, 79 Tick request_time) override; 84 Tick forward_time) override; 104 Tick recvAtomic(PacketPtr pkt) override; 106 Tick recvAtomicSnoop(PacketPtr pkt) override {
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H A D | cache.hh | 94 Tick request_time) override; 97 Tick forward_time, 98 Tick request_time) override; 102 void doWritebacks(PacketList& writebacks, Tick forward_time) override; 116 Tick recvAtomic(PacketPtr pkt) override; 118 Tick recvAtomicSnoop(PacketPtr pkt) override;
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/gem5/src/dev/alpha/ |
H A D | tsunami_io.hh | 110 Tick frequency() const; 126 Tick read(PacketPtr pkt) override; 127 Tick write(PacketPtr pkt) override;
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/gem5/src/dev/arm/ |
H A D | gic_v2m.hh | 85 const Tick pioDelay; 108 virtual Tick read(PacketPtr pkt); 112 virtual Tick write(PacketPtr pkt);
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H A D | energy_ctrl.hh | 127 Tick read(PacketPtr pkt) override; 133 Tick write(PacketPtr pkt) override; 169 static uint32_t ticksTokHz(Tick period) {
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H A D | rtc_pl031.hh | 69 Tick lastWrittenTick; 119 Tick read(PacketPtr pkt) override; 126 Tick write(PacketPtr pkt) override;
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/gem5/src/dev/x86/ |
H A D | speaker.hh | 46 Tick latency; 72 Tick read(PacketPtr pkt) override; 74 Tick write(PacketPtr pkt) override;
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/gem5/src/dev/mips/ |
H A D | malta_io.hh | 107 Tick frequency() const; 123 Tick read(PacketPtr pkt) override; 124 Tick write(PacketPtr pkt) override;
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/gem5/src/mem/ruby/structures/ |
H A D | AbstractReplacementPolicy.cc | 40 m_last_ref_ptr = new Tick*[m_num_sets]; 42 m_last_ref_ptr[i] = new Tick[m_assoc]; 70 Tick
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/gem5/src/cpu/testers/traffic_gen/ |
H A D | dram_rot_gen.hh | 90 DramRotGen(SimObject &obj, MasterID master_id, Tick _duration, 93 Tick min_period, Tick max_period,
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H A D | linear_gen.cc | 92 Tick 93 LinearGen::nextPacketTick(bool elastic, Tick delay) const 104 Tick wait = random_mt.random(minPeriod, maxPeriod);
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H A D | random_gen.cc | 85 Tick 86 RandomGen::nextPacketTick(bool elastic, Tick delay) const 98 Tick wait = random_mt.random(minPeriod, maxPeriod);
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/gem5/util/systemc/gem5_within_systemc/ |
H A D | sc_module.hh | 101 Tick wait_exit_time; 120 void wakeup(Tick when); 156 GlobalSimLoopExitEvent *simulate(Tick num_cycles = MaxTick);
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/gem5/src/arch/arm/tracers/ |
H A D | tarmac_tracer.hh | 100 InstRecord* getInstRecord(Tick when, ThreadContext *tc, 115 Tick startTick; 116 Tick endTick;
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