112396SRiken.Gohil@arm.com/*
212396SRiken.Gohil@arm.com * Copyright (c) 2012-2013, 2016-2017 ARM Limited
312396SRiken.Gohil@arm.com * All rights reserved
412396SRiken.Gohil@arm.com *
512396SRiken.Gohil@arm.com * The license below extends only to copyright in the software and shall
612396SRiken.Gohil@arm.com * not be construed as granting a license to any other intellectual
712396SRiken.Gohil@arm.com * property including but not limited to intellectual property relating
812396SRiken.Gohil@arm.com * to a hardware implementation of the functionality of the software
912396SRiken.Gohil@arm.com * licensed here under.  You may use the software subject to the license
1012396SRiken.Gohil@arm.com * terms below provided that you ensure that this notice is replicated
1112396SRiken.Gohil@arm.com * unmodified and in its entirety in all distributions of the software,
1212396SRiken.Gohil@arm.com * modified or unmodified, in source code or in binary form.
1312396SRiken.Gohil@arm.com *
1412396SRiken.Gohil@arm.com * Redistribution and use in source and binary forms, with or without
1512396SRiken.Gohil@arm.com * modification, are permitted provided that the following conditions are
1612396SRiken.Gohil@arm.com * met: redistributions of source code must retain the above copyright
1712396SRiken.Gohil@arm.com * notice, this list of conditions and the following disclaimer;
1812396SRiken.Gohil@arm.com * redistributions in binary form must reproduce the above copyright
1912396SRiken.Gohil@arm.com * notice, this list of conditions and the following disclaimer in the
2012396SRiken.Gohil@arm.com * documentation and/or other materials provided with the distribution;
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2312396SRiken.Gohil@arm.com * this software without specific prior written permission.
2412396SRiken.Gohil@arm.com *
2512396SRiken.Gohil@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
2612396SRiken.Gohil@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2712396SRiken.Gohil@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2812396SRiken.Gohil@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2912396SRiken.Gohil@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
3012396SRiken.Gohil@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
3112396SRiken.Gohil@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
3212396SRiken.Gohil@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
3312396SRiken.Gohil@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3412396SRiken.Gohil@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3512396SRiken.Gohil@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3612396SRiken.Gohil@arm.com *
3712396SRiken.Gohil@arm.com * Authors: Thomas Grass
3812396SRiken.Gohil@arm.com *          Andreas Hansson
3912396SRiken.Gohil@arm.com *          Sascha Bischoff
4012396SRiken.Gohil@arm.com *          Neha Agarwal
4112396SRiken.Gohil@arm.com */
4212396SRiken.Gohil@arm.com
4312396SRiken.Gohil@arm.com#include "cpu/testers/traffic_gen/linear_gen.hh"
4412396SRiken.Gohil@arm.com
4512396SRiken.Gohil@arm.com#include <algorithm>
4612396SRiken.Gohil@arm.com
4712396SRiken.Gohil@arm.com#include "base/random.hh"
4812396SRiken.Gohil@arm.com#include "base/trace.hh"
4912396SRiken.Gohil@arm.com#include "debug/TrafficGen.hh"
5012396SRiken.Gohil@arm.com
5112396SRiken.Gohil@arm.comvoid
5212396SRiken.Gohil@arm.comLinearGen::enter()
5312396SRiken.Gohil@arm.com{
5412396SRiken.Gohil@arm.com    // reset the address and the data counter
5512396SRiken.Gohil@arm.com    nextAddr = startAddr;
5612396SRiken.Gohil@arm.com    dataManipulated = 0;
5712396SRiken.Gohil@arm.com}
5812396SRiken.Gohil@arm.com
5912396SRiken.Gohil@arm.comPacketPtr
6012396SRiken.Gohil@arm.comLinearGen::getNextPacket()
6112396SRiken.Gohil@arm.com{
6212396SRiken.Gohil@arm.com    // choose if we generate a read or a write here
6312396SRiken.Gohil@arm.com    bool isRead = readPercent != 0 &&
6412396SRiken.Gohil@arm.com        (readPercent == 100 || random_mt.random(0, 100) < readPercent);
6512396SRiken.Gohil@arm.com
6612396SRiken.Gohil@arm.com    assert((readPercent == 0 && !isRead) || (readPercent == 100 && isRead) ||
6712396SRiken.Gohil@arm.com           readPercent != 100);
6812396SRiken.Gohil@arm.com
6912396SRiken.Gohil@arm.com    DPRINTF(TrafficGen, "LinearGen::getNextPacket: %c to addr %x, size %d\n",
7012396SRiken.Gohil@arm.com            isRead ? 'r' : 'w', nextAddr, blocksize);
7112396SRiken.Gohil@arm.com
7212396SRiken.Gohil@arm.com    // Add the amount of data manipulated to the total
7312396SRiken.Gohil@arm.com    dataManipulated += blocksize;
7412396SRiken.Gohil@arm.com
7512396SRiken.Gohil@arm.com    PacketPtr pkt = getPacket(nextAddr, blocksize,
7612396SRiken.Gohil@arm.com                              isRead ? MemCmd::ReadReq : MemCmd::WriteReq);
7712396SRiken.Gohil@arm.com
7812396SRiken.Gohil@arm.com    // increment the address
7912396SRiken.Gohil@arm.com    nextAddr += blocksize;
8012396SRiken.Gohil@arm.com
8112396SRiken.Gohil@arm.com    // If we have reached the end of the address space, reset the
8212396SRiken.Gohil@arm.com    // address to the start of the range
8312396SRiken.Gohil@arm.com    if (nextAddr > endAddr) {
8412396SRiken.Gohil@arm.com        DPRINTF(TrafficGen, "Wrapping address to the start of "
8512396SRiken.Gohil@arm.com                "the range\n");
8612396SRiken.Gohil@arm.com        nextAddr = startAddr;
8712396SRiken.Gohil@arm.com    }
8812396SRiken.Gohil@arm.com
8912396SRiken.Gohil@arm.com    return pkt;
9012396SRiken.Gohil@arm.com}
9112396SRiken.Gohil@arm.com
9212396SRiken.Gohil@arm.comTick
9312396SRiken.Gohil@arm.comLinearGen::nextPacketTick(bool elastic, Tick delay) const
9412396SRiken.Gohil@arm.com{
9512396SRiken.Gohil@arm.com    // Check to see if we have reached the data limit. If dataLimit is
9612396SRiken.Gohil@arm.com    // zero we do not have a data limit and therefore we will keep
9712396SRiken.Gohil@arm.com    // generating requests for the entire residency in this state.
9812396SRiken.Gohil@arm.com    if (dataLimit && dataManipulated >= dataLimit) {
9912396SRiken.Gohil@arm.com        DPRINTF(TrafficGen, "Data limit for LinearGen reached.\n");
10012396SRiken.Gohil@arm.com        // there are no more requests, therefore return MaxTick
10112396SRiken.Gohil@arm.com        return MaxTick;
10212396SRiken.Gohil@arm.com    } else {
10312396SRiken.Gohil@arm.com        // return the time when the next request should take place
10412396SRiken.Gohil@arm.com        Tick wait = random_mt.random(minPeriod, maxPeriod);
10512396SRiken.Gohil@arm.com
10612396SRiken.Gohil@arm.com        // compensate for the delay experienced to not be elastic, by
10712396SRiken.Gohil@arm.com        // default the value we generate is from the time we are
10812396SRiken.Gohil@arm.com        // asked, so the elasticity happens automatically
10912396SRiken.Gohil@arm.com        if (!elastic) {
11012396SRiken.Gohil@arm.com            if (wait < delay)
11112396SRiken.Gohil@arm.com                wait = 0;
11212396SRiken.Gohil@arm.com            else
11312396SRiken.Gohil@arm.com                wait -= delay;
11412396SRiken.Gohil@arm.com        }
11512396SRiken.Gohil@arm.com
11612396SRiken.Gohil@arm.com        return curTick() + wait;
11712396SRiken.Gohil@arm.com    }
11812396SRiken.Gohil@arm.com}
119