Searched refs:Addr (Results 501 - 525 of 767) sorted by relevance

<<21222324252627282930>>

/gem5/src/mem/
H A Dpacket.cc237 Packet::trySatisfyFunctional(Printable *obj, Addr addr, bool is_secure, int size,
240 const Addr func_start = getAddr();
241 const Addr func_end = getAddr() + getSize() - 1;
242 const Addr val_start = addr;
243 const Addr val_end = val_start + size - 1;
264 const Addr val_offset = func_start > val_start ?
266 const Addr func_offset = func_start < val_start ?
268 const Addr overlap_size = std::min(val_end, func_end)+1 -
400 Packet::matchBlockAddr(const Addr addr, const bool is_secure,
414 Packet::matchAddr(const Addr add
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/gem5/src/arch/x86/
H A Dprocess.cc139 Addr brk_point = roundUp(objFile->dataBase() + objFile->dataSize() +
141 Addr stack_base = 0x7FFFFFFFF000ULL;
142 Addr max_stack_size = 8 * 1024 * 1024;
143 Addr next_thread_stack_base = stack_base - max_stack_size;
144 Addr mmap_end = 0x7FFFF7FFF000ULL;
154 Addr eip = pc.pc();
179 Addr brk_point = roundUp(objFile->dataBase() + objFile->dataSize() +
181 Addr stack_base = _gdtStart;
182 Addr max_stack_size = 8 * 1024 * 1024;
183 Addr next_thread_stack_bas
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H A Dpagetable_walker.hh128 Fault startFunctional(Addr &addr, unsigned &logBytes);
139 void setupWalk(Addr vaddr);
164 Fault startFunctional(ThreadContext * _tc, Addr &addr,
/gem5/src/cpu/checker/
H A Dcpu.hh140 Addr dbg_vtophys(Addr addr);
449 Addr instAddr() { return thread->instAddr(); }
450 Addr nextInstAddr() { return thread->nextInstAddr(); }
510 demapPage(Addr vaddr, uint64_t asn) override
517 void armMonitor(Addr address) override { BaseCPU::armMonitor(0, address); }
525 demapInstPage(Addr vaddr, uint64_t asn)
531 demapDataPage(Addr vaddr, uint64_t asn)
552 RequestPtr genMemFragmentRequest(Addr frag_addr, int size,
557 Fault readMem(Addr add
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/gem5/src/cpu/pred/
H A Dtage_sc_l_64KB.cc84 TAGE_SC_L_64KB_StatisticalCorrector::getIndBiasBank(Addr branch_pc,
93 TAGE_SC_L_64KB_StatisticalCorrector::gPredictions(ThreadID tid, Addr branch_pc,
141 TAGE_SC_L_64KB_StatisticalCorrector::scHistoryUpdate(Addr branch_pc,
143 Addr corrTarget)
165 TAGE_SC_L_64KB_StatisticalCorrector::gUpdates(ThreadID tid, Addr pc,
206 TAGE_SC_L_TAGE_64KB::gtag(ThreadID tid, Addr pc, int bank) const
264 TAGE_SC_L_TAGE_64KB::handleTAGEUpdate(Addr branch_pc, bool taken,
H A Dtage_sc_l_8KB.cc67 TAGE_SC_L_8KB_StatisticalCorrector::getIndBiasBank(Addr branch_pc,
76 ThreadID tid, Addr branch_pc, BranchInfo* bi, int & lsum, int64_t phist)
104 TAGE_SC_L_8KB_StatisticalCorrector::scHistoryUpdate(Addr branch_pc,
106 Addr corrTarget)
124 TAGE_SC_L_8KB_StatisticalCorrector::gUpdates(ThreadID tid, Addr pc, bool taken,
171 TAGE_SC_L_TAGE_8KB::gtag(ThreadID tid, Addr pc, int bank) const
258 TAGE_SC_L_TAGE_8KB::handleTAGEUpdate(Addr branch_pc, bool taken,
H A Dmultiperspective_perceptron_tage_64KB.cc73 MPP_StatisticalCorrector_64KB::getBiasLSUM(Addr branch_pc,
83 MPP_StatisticalCorrector_64KB::gPredictions(ThreadID tid, Addr branch_pc,
114 MPP_StatisticalCorrector_64KB::gUpdates(ThreadID tid, Addr pc, bool taken,
136 MPP_StatisticalCorrector_64KB::scHistoryUpdate(Addr branch_pc,
138 StatisticalCorrector::BranchInfo *bi, Addr corrTarget)
H A Dloop_predictor.cc87 LoopPredictor::lindex(Addr pc_in, unsigned instShiftAmt) const
96 Addr pc = pc_in >> instShiftAmt;
113 LoopPredictor::getLoop(Addr pc, BranchInfo* bi, bool speculative,
177 LoopPredictor::loopUpdate(Addr pc, bool taken, BranchInfo* bi, bool tage_pred)
272 LoopPredictor::loopPredict(ThreadID tid, Addr branch_pc, bool cond_branch,
326 LoopPredictor::condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken,
/gem5/src/sim/
H A Dsyscall_emul.cc87 exitFutexWake(ThreadContext *tc, Addr addr, uint64_t tgid)
247 Addr new_brk = p->getSyscallArg(tc, index);
250 Addr brk_point = mem_state->getBrkPoint();
271 Addr next_page = roundUp(gen.addr(), PageBytes);
339 Addr result_ptr = p->getSyscallArg(tc, index);
379 Addr buf_ptr = p->getSyscallArg(tc, index);
396 Addr buf_ptr = p->getSyscallArg(tc, index);
440 Addr buf_ptr = p->getSyscallArg(tc, index);
872 Addr tgt_addr = 0;
1240 Addr buf_pt
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/gem5/src/arch/alpha/
H A Dfaults.hh43 typedef Addr FaultVect;
235 Addr pc;
238 ItbFault(Addr _pc) : pc(_pc) { }
254 ItbPageFault(Addr pc) : ItbFault(pc) { }
270 ItbAcvFault(Addr pc) : ItbFault(pc) { }
H A Dkernel_stats.cc55 idleProcess((Addr)-1), themode(kernel), lastModeTick(0),
156 Statistics::setIdleProcess(Addr idlepcbb, ThreadContext *tc)
186 Addr pcbb = tc->readMiscRegNoEffect(IPR_PALtemp23);
195 Statistics::context(Addr oldpcbb, Addr newpcbb, ThreadContext *tc)
/gem5/src/cpu/testers/traffic_gen/
H A Dtraffic_gen.cc175 Addr addrOffset;
191 Addr start_addr;
192 Addr end_addr;
193 Addr blocksize;
196 Addr data_limit;
/gem5/src/dev/net/
H A Dsinic.hh168 uint8_t &regData8(Addr daddr) { return *((uint8_t *)&regs + daddr); }
169 uint32_t &regData32(Addr daddr) { return *(uint32_t *)&regData8(daddr); }
170 uint64_t &regData64(Addr daddr) { return *(uint64_t *)&regData8(daddr); }
178 Addr rxDmaAddr;
188 Addr txDmaAddr;
270 // Fault iprRead(Addr daddr, ContextID cpu, uint64_t &result);
/gem5/src/gpu-compute/
H A Dlds_state.cc130 std::vector<Addr> addr_array;
141 addr_array[j] = std::numeric_limits<Addr>::max();
149 if (addr_array[j] != std::numeric_limits<Addr>::max()
151 addr_array[j] = std::numeric_limits<Addr>::max();
158 if (addr_array[j] != std::numeric_limits<Addr>::max()) {
/gem5/src/mem/ruby/system/
H A DDMASequencer.cc71 Addr paddr = pkt->getAddr();
77 Addr line_addr = makeLineAddress(paddr);
121 DMASequencer::issueNext(const Addr& address)
173 DMASequencer::dataCallback(const DataBlock & dblk, const Addr& address)
193 DMASequencer::ackCallback(const Addr& address)
/gem5/src/cpu/simple/
H A Dtiming.hh225 Addr cacheBlockMask;
285 Fault initiateMemRead(Addr addr, unsigned size,
291 Addr addr, Request::Flags flags, uint64_t *res,
295 Fault initiateMemAMO(Addr addr, unsigned size, Request::Flags flags,
317 void printAddr(Addr a);
/gem5/src/cpu/o3/probe/
H A Delastic_trace.hh289 Addr pc;
293 Addr physAddr;
295 Addr virtAddr;
/gem5/src/mem/cache/
H A Dbase.hh426 Addr regenerateBlkAddr(CacheBlk* blk);
823 bool inRange(Addr addr) const;
1094 Addr blk_addr = pkt->getBlockAddr(blkSize);
1177 bool inCache(Addr addr, bool is_secure) const {
1181 bool hasBeenPrefetched(Addr addr, bool is_secure) const {
1190 bool inMissQueue(Addr addr, bool is_secure) const {
1325 bool delay(Addr blk_addr) {
1339 void resetDelay(Addr blk_addr) {
1353 void updateMode(Addr write_addr, unsigned write_size, Addr blk_add
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/gem5/src/mem/ruby/network/
H A DMessageBuffer.hh61 void reanalyzeMessages(Addr addr, Tick current_time);
63 void stallMessage(Addr addr, Tick current_time);
152 typedef std::map<Addr, std::list<MsgPtr> > StallMsgMapType;
/gem5/src/base/
H A Dtypes.hh142 typedef uint64_t Addr; typedef
166 const Addr MaxAddr = (Addr)-1;
/gem5/src/arch/arm/insts/
H A Dpred_inst.hh254 Addr pc, const SymbolTable *symtab) const override;
275 Addr pc, const SymbolTable *symtab) const override;
294 Addr pc, const SymbolTable *symtab) const override;
313 Addr pc, const SymbolTable *symtab) const override;
331 Addr pc, const SymbolTable *symtab) const override;
375 Addr pc, const SymbolTable *symtab) const override;
/gem5/src/dev/arm/
H A Dgic_v2.hh480 uint32_t readDistributor(ContextID ctx, Addr daddr,
482 uint32_t readDistributor(ContextID ctx, Addr daddr) override {
490 uint32_t readCpu(ContextID ctx, Addr daddr) override;
496 void writeDistributor(ContextID ctx, Addr daddr,
498 void writeDistributor(ContextID ctx, Addr daddr,
507 void writeCpu(ContextID ctx, Addr daddr, uint32_t data) override;
/gem5/src/arch/x86/insts/
H A Dmicroldstop.hh117 std::string generateDisassembly(Addr pc,
151 std::string generateDisassembly(Addr pc,
/gem5/src/cpu/
H A Dinst_pb_trace.cc166 InstPBTrace::traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f)
/gem5/src/arch/arm/
H A Dtypes.hh239 set(Addr val)
245 PCState(Addr val) : flags(0), nextFlags(0), _itstate(0),
425 Addr
432 instNPC(Addr val)
443 Addr
451 instIWNPC(Addr val)
455 Addr newPC = val;
481 instAIWNPC(Addr val)

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