Searched refs:Addr (Results 476 - 500 of 767) sorted by relevance

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/gem5/src/dev/
H A Dio_device.cc75 BasicPioDevice::BasicPioDevice(const Params *p, Addr size)
H A DDevice.py78 pio_addr = Param.Addr("Device Address")
111 pio_size = Param.Addr(0x8, "Size of address range")
/gem5/src/dev/arm/
H A Dgic_v3_redistributor.hh169 Addr lpiConfigurationTablePtr;
171 Addr lpiPendingTablePtr;
231 uint64_t read(Addr addr, size_t size, bool is_secure_access);
233 void write(Addr addr, uint64_t data, size_t size, bool is_secure_access);
H A Dtimer_cpulocal.hh144 void read(PacketPtr pkt, Addr daddr);
147 void write(PacketPtr pkt, Addr daddr);
H A Dhdlcd.hh118 const Addr pixelBufferSize;
258 uint32_t readReg(Addr offset);
259 void writeReg(Addr offset, uint32_t value);
374 void startFrame(Addr fb_base);
390 Addr nextLineAddr;
391 Addr frameEnd;
/gem5/src/arch/x86/insts/
H A Dmicroregop.cc81 std::string RegOp::generateDisassembly(Addr pc,
95 std::string RegOpImm::generateDisassembly(Addr pc,
H A Dmicroregop.hh97 std::string generateDisassembly(Addr pc,
119 std::string generateDisassembly(Addr pc,
H A Dmicromediaop.hh108 std::string generateDisassembly(Addr pc,
129 std::string generateDisassembly(Addr pc,
/gem5/src/arch/arm/freebsd/
H A Dsystem.cc94 Addr addr = 0;
131 Addr ra = _dtb_file->findReleaseAddr();
/gem5/src/arch/arm/insts/
H A Dmem.cc81 RfeOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
106 SrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
H A Dmisc64.cc45 ImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
54 RegRegImmImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
67 Addr pc, const SymbolTable *symtab) const
81 UnknownOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
338 MiscRegImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
350 Addr pc, const SymbolTable *symtab) const
362 Addr pc, const SymbolTable *symtab) const
396 MiscRegImplDefined64::generateDisassembly(Addr pc,
/gem5/src/mem/
H A Dsnoop_filter.cc74 Addr line_addr = cpkt->getBlockAddr(linesize);
158 SnoopFilter::finishRequest(bool will_retry, Addr addr, bool is_secure)
163 Addr line_addr = (addr & ~(Addr(linesize - 1)));
190 Addr line_addr = cpkt->getBlockAddr(linesize);
261 Addr line_addr = cpkt->getBlockAddr(linesize);
310 Addr line_addr = cpkt->getBlockAddr(linesize);
351 Addr line_addr = cpkt->getBlockAddr(linesize);
/gem5/src/cpu/minor/
H A Dcpu.hh133 Addr dbg_vtophys(Addr addr);
/gem5/src/cpu/trace/
H A Dtrace_cpu.hh357 Addr addr;
360 Addr blocksize;
369 Addr pc;
475 bool send(Addr addr, unsigned size, const MemCmd& cmd,
476 Request::FlagsType flags, Addr pc);
604 Addr physAddr;
607 Addr virtAddr;
619 Addr pc;
/gem5/src/gpu-compute/
H A Ddispatcher.hh66 Addr pioAddr;
67 Addr pioSize;
H A Dtlb_coalescer.cc110 Addr incoming_virt_page_addr = roundDown(incoming_pkt->req->getVaddr(),
113 Addr coalesced_virt_page_addr = roundDown(coalesced_pkt->req->getVaddr(),
144 Addr virt_page_addr = roundDown(pkt->req->getVaddr(), TheISA::PageBytes);
154 Addr first_entry_vaddr = tlb_entry->vaddr;
155 Addr first_entry_paddr = tlb_entry->paddr;
163 Addr phys_page_paddr = pkt->req->getPaddr();
184 Addr paddr = phys_page_paddr;
350 Addr virt_page_addr = roundDown(pkt->req->getVaddr(), TheISA::PageBytes);
434 Addr virt_page_addr = roundDown(first_packet->req->getVaddr(),
516 Addr cleanup_add
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/gem5/src/cpu/o3/
H A Dstore_set.cc116 StoreSet::violation(Addr store_PC, Addr load_PC)
201 StoreSet::insertLoad(Addr load_PC, InstSeqNum load_seq_num)
209 StoreSet::insertStore(Addr store_PC, InstSeqNum store_seq_num, ThreadID tid)
239 StoreSet::checkInst(Addr PC)
274 StoreSet::issued(Addr issued_PC, InstSeqNum issued_seq_num, bool is_store)
H A Dlsq.hh297 const Addr _addr;
318 const Addr& addr, const uint32_t& size,
408 addRequest(Addr addr, unsigned size,
460 setVirt(int asid, Addr vaddr, unsigned size, Request::Flags flags_,
461 MasterID mid, Addr pc)
483 Addr getVaddr(int idx = 0) const { return request(idx)->getVaddr(); }
560 virtual bool isCacheBlockHit(Addr blockAddr, Addr cacheBlockMask) = 0;
721 const Addr& addr, const uint32_t& size,
738 virtual bool isCacheBlockHit(Addr blockAdd
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/gem5/src/arch/mips/
H A Dprocess.cc60 Addr stack_base = 0x7FFFFFFF;
62 Addr max_stack_size = 8 * 1024 * 1024;
65 Addr next_thread_stack_base = stack_base - max_stack_size;
68 Addr brk_point = objFile->dataBase() + objFile->dataSize() +
73 Addr mmap_end = brk_point + 0x40000000L;
180 Addr auxv_array_end = auxv_array_base;
/gem5/src/cpu/pred/
H A Dtournament.cc125 TournamentBP::calcLocHistIdx(Addr &branch_addr)
165 TournamentBP::btbUpdate(ThreadID tid, Addr branch_addr, void * &bp_history)
176 TournamentBP::lookup(ThreadID tid, Addr branch_addr, void * &bp_history)
237 TournamentBP::uncondBranch(ThreadID tid, Addr pc, void * &bp_history)
253 TournamentBP::update(ThreadID tid, Addr branch_addr, bool taken,
255 const StaticInstPtr & inst, Addr corrTarget)
/gem5/src/dev/alpha/
H A Dtsunami_pchip.cc82 Addr daddr = (pkt->getAddr() - pioRange.start()) >> 6;;
166 Addr daddr = (pkt->getAddr() - pioRange.start()) >> 6;
252 Addr
253 TsunamiPChip::dmaAddr(const PciBusAddr &dev, Addr busAddr) const
264 Addr pteAddr;
265 Addr dmaAddr;
/gem5/src/mem/cache/
H A Dmshr.hh197 void init(Addr blk_addr, Addr blk_size) {
307 Addr blkAddr;
310 Addr blkSize;
420 void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt,
535 bool matchBlockAddr(const Addr addr, const bool is_secure) const override;
/gem5/src/mem/ruby/system/
H A DVIPERCoalescer.cc170 VIPERCoalescer::wbCallback(Addr addr)
186 VIPERCoalescer::invCallback(Addr addr)
214 Addr addr = m_dataCache_ptr->getAddressAtIdx(i);
245 Addr addr = m_dataCache_ptr->getAddressAtIdx(i);
273 Addr addr = m_dataCache_ptr->getAddressAtIdx(i);
289 Addr addr = m_dataCache_ptr->getAddressAtIdx(i);
H A DGPUCoalescer.cc237 Addr line_addr = makeLineAddress(pkt->getAddr());
328 Addr line_addr = makeLineAddress(pkt->getAddr());
395 Addr line_addr = makeLineAddress(srequest->pkt->getAddr());
412 GPUCoalescer::handleLlsc(Addr address, GPUCoalescerRequest* request)
456 GPUCoalescer::writeCallback(Addr address, DataBlock& data)
462 GPUCoalescer::writeCallback(Addr address,
470 GPUCoalescer::writeCallback(Addr address,
483 GPUCoalescer::writeCallback(Addr address,
538 GPUCoalescer::readCallback(Addr address, DataBlock& data)
544 GPUCoalescer::readCallback(Addr addres
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/gem5/src/arch/arm/
H A Dfaults.hh61 typedef Addr FaultOffset;
87 virtual Addr getVector(ThreadContext *tc);
88 Addr getVector64(ThreadContext *tc);
238 virtual bool getFaultVAddr(Addr &va) const { return false; }
280 Addr getVector(ThreadContext *tc) override;
417 Addr faultAddr;
423 Addr OVAddr;
433 AbortFault(Addr _faultAddr, bool _write, TlbEntry::DomainType _domain,
441 bool getFaultVAddr(Addr &va) const override;
463 PrefetchAbort(Addr _add
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