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/gem5/tests/quick/se/00.hello/ref/power/linux/o3-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/00.hello/ref/x86/linux/o3-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/src/arch/mips/
H A DSConscript6328:67dbc192f692 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Collapse ARM and MIPS regfile directories.
/gem5/configs/example/
H A Druby_random_test.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
/gem5/configs/common/
H A DCpuConfig.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
H A DMemConfig.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
/gem5/tests/configs/
H A Dbase_config.py10720:67b3e74de9ae Mon Mar 02 04:00:00 EST 2015 Andreas Hansson <andreas.hansson@arm.com> mem: Move crossbar default latencies to subclasses

This patch introduces a few subclasses to the CoherentXBar and
NoncoherentXBar to distinguish the different uses in the system. We
use the crossbar in a wide range of places: interfacing cores to the
L2, as a system interconnect, connecting I/O and peripherals,
etc. Needless to say, these crossbars have very different performance,
and the clock frequency alone is not enough to distinguish these
scenarios.

Instead of trying to capture every possible case, this patch
introduces dedicated subclasses for the three primary use-cases:
L2XBar, SystemXBar and IOXbar. More can be added if needed, and the
defaults can be overridden.
H A Dmemtest.py10720:67b3e74de9ae Mon Mar 02 04:00:00 EST 2015 Andreas Hansson <andreas.hansson@arm.com> mem: Move crossbar default latencies to subclasses

This patch introduces a few subclasses to the CoherentXBar and
NoncoherentXBar to distinguish the different uses in the system. We
use the crossbar in a wide range of places: interfacing cores to the
L2, as a system interconnect, connecting I/O and peripherals,
etc. Needless to say, these crossbars have very different performance,
and the clock frequency alone is not enough to distinguish these
scenarios.

Instead of trying to capture every possible case, this patch
introduces dedicated subclasses for the three primary use-cases:
L2XBar, SystemXBar and IOXbar. More can be added if needed, and the
defaults can be overridden.
/gem5/src/arch/arm/
H A DSConscript6328:67dbc192f692 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Collapse ARM and MIPS regfile directories.
H A Disa.hh9461:67a6ba6604c8 Sat Jan 12 23:09:00 EST 2013 Nilay Vaish <nilay@cs.wisc.edu> x86: Changes to decoder, corrects 9376
The changes made by the changeset 9376 were not quite correct. The patch made
changes to the code which resulted in decoder not getting initialized correctly
when the state was restored from a checkpoint.

This patch adds a startup function to each ISA object. For x86, this function
sets the required state in the decoder. For other ISAs, the function is empty
right now.
6328:67dbc192f692 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Collapse ARM and MIPS regfile directories.
/gem5/src/mem/slicc/
H A Dparser.py9692:67d9da312ef0 Tue May 21 12:31:00 EDT 2013 Nilay Vaish <nilay@cs.wisc.edu>, Malek Musleh <malek.musleh@gmail.com> ruby: add stats to .sm files, remove cache profiler
This patch changes the way cache statistics are collected in ruby.

As of now, there is separate entity called CacheProfiler which holds
statistical variables for caches. The CacheMemory class defines different
functions for accessing the CacheProfiler. These functions are then invoked
in the .sm files. I find this approach opaque and prone to error. Secondly,
we probably should not be paying the cost of a function call for recording
statistics.

Instead, this patch allows for accessing statistical variables in the
.sm files. The collection would become transparent. Secondly, it would happen
in place, so no function calls. The patch also removes the CacheProfiler class.
/gem5/src/mem/ruby/profiler/
H A DProfiler.hh9692:67d9da312ef0 Tue May 21 12:31:00 EDT 2013 Nilay Vaish <nilay@cs.wisc.edu>, Malek Musleh <malek.musleh@gmail.com> ruby: add stats to .sm files, remove cache profiler
This patch changes the way cache statistics are collected in ruby.

As of now, there is separate entity called CacheProfiler which holds
statistical variables for caches. The CacheMemory class defines different
functions for accessing the CacheProfiler. These functions are then invoked
in the .sm files. I find this approach opaque and prone to error. Secondly,
we probably should not be paying the cost of a function call for recording
statistics.

Instead, this patch allows for accessing statistical variables in the
.sm files. The collection would become transparent. Secondly, it would happen
in place, so no function calls. The patch also removes the CacheProfiler class.
/gem5/src/cpu/
H A Dexec_context.hh7520:67c670459d01 Fri Aug 13 09:16:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> CPU: Add readBytes and writeBytes functions to the exec contexts.
5639:67cc7f0427e7 Sat Oct 11 05:27:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Eliminate the hwrei function.
/gem5/configs/ruby/
H A DRuby.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
10720:67b3e74de9ae Mon Mar 02 04:00:00 EST 2015 Andreas Hansson <andreas.hansson@arm.com> mem: Move crossbar default latencies to subclasses

This patch introduces a few subclasses to the CoherentXBar and
NoncoherentXBar to distinguish the different uses in the system. We
use the crossbar in a wide range of places: interfacing cores to the
L2, as a system interconnect, connecting I/O and peripherals,
etc. Needless to say, these crossbars have very different performance,
and the clock frequency alone is not enough to distinguish these
scenarios.

Instead of trying to capture every possible case, this patch
introduces dedicated subclasses for the three primary use-cases:
L2XBar, SystemXBar and IOXbar. More can be added if needed, and the
defaults can be overridden.
H A DMI_example.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
H A DMOESI_hammer.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
H A DMOESI_CMP_token.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
H A DMOESI_CMP_directory.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
/gem5/src/arch/x86/isa/decoder/
H A Done_byte_opcodes.isa5448:67c8b7badec1 Thu Jun 12 00:58:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Implement and hook up STI and CLI instructions.
/gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/long/se/20.parser/ref/x86/linux/o3-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/src/cpu/o3/
H A Ddyn_inst_impl.hh5639:67cc7f0427e7 Sat Oct 11 05:27:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Eliminate the hwrei function.

Completed in 295 milliseconds

12345678