Searched hist:2727 (Results 1 - 14 of 14) sorted by relevance

/gem5/src/systemc/tests/
H A DSConscript13656:2727dfddacf3 Sat Feb 09 04:37:00 EST 2019 Gabe Black <gabeblack@google.com> scons: Change an = to a += when accumulating sources from filters.

The loop accidentally used a = when it should have used a +=, meaning
only the sources from the final filter would be used.

Change-Id: Ie066a5f85696f05d9ad3cf61f928b12deb39475b
Reviewed-on: https://gem5-review.googlesource.com/c/16285
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/tests/configs/
H A Drubytest-ruby.py8933:2727a5a0aadc Fri Apr 06 16:47:00 EDT 2012 Brad Beckmann <Brad.Beckmann@amd.com> MOESI_hammer: fixed bug with single cpu + flushes, then modified the regression tester to check this functionality
/gem5/src/cpu/o3/
H A Dinst_queue.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Diew.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dlsq.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dlsq_impl.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dlsq_unit.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dinst_queue_impl.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Diew_impl.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dfetch.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dcommit_impl.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dlsq_unit_impl.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
H A Dfetch_impl.hh2727:91e17c7ee622 Tue Jun 13 22:35:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Minor updates for stats.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
/gem5/src/
H A DSConscript13656:2727dfddacf3 Sat Feb 09 04:37:00 EST 2019 Gabe Black <gabeblack@google.com> scons: Change an = to a += when accumulating sources from filters.

The loop accidentally used a = when it should have used a +=, meaning
only the sources from the final filter would be used.

Change-Id: Ie066a5f85696f05d9ad3cf61f928b12deb39475b
Reviewed-on: https://gem5-review.googlesource.com/c/16285
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

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