Searched hist:13626 (Results 1 - 25 of 39) sorted by relevance
| /gem5/src/cpu/pred/ | ||
| H A D | tage_base.cc | 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | tage_base.hh | 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | tage.cc | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | tage.hh | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | bi_mode.cc | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | 2bit_local.cc | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | 2bit_local.hh | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | bi_mode.hh | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | ltage.hh | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | bpred_unit.hh | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | tournament.hh | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | ltage.cc | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | bpred_unit.cc | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | tournament.cc | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | SConscript | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | BranchPredictor.py | diff 13626:d6a6358aa6db Sat Jan 05 04:24:00 EST 2019 Jairo Balart <jairo.balart@metempsy.com> cpu: Made TAGE a SimObject that can be used by other predictors The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec: http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/arch/alpha/ | ||
| H A D | isa.cc | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| H A D | isa.hh | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/arch/riscv/ | ||
| H A D | isa.cc | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| H A D | isa.hh | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/arch/power/ | ||
| H A D | isa.hh | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/arch/mips/ | ||
| H A D | isa.cc | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| H A D | isa.hh | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/arch/sparc/ | ||
| H A D | isa.hh | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/cpu/minor/ | ||
| H A D | exec_context.hh | diff 13582:989577bf6abc Thu Oct 18 20:34:00 EDT 2018 Gabe Black <gabeblack@google.com> arch: cpu: Stop passing around misc registers by reference. These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
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