Searched refs:setVecReg (Results 1 - 13 of 13) sorted by relevance
/gem5/src/cpu/checker/ |
H A D | thread_context.hh | 361 setVecReg(const RegId& reg, const VecRegContainer& val) override 363 actualTC->setVecReg(reg, val); 364 checkerTC->setVecReg(reg, val);
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H A D | cpu_impl.hh | 616 thread->setVecReg(idx, mismatch_val.asVector()); 651 thread->setVecReg(idx, res.asVector());
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H A D | cpu.hh | 398 thread->setVecReg(reg, val);
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/gem5/src/cpu/o3/ |
H A D | rename_map.cc | 217 regFile->setVecReg(regFile->getTrueId(&pregId), new_RF[i]);
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H A D | regfile.hh | 330 setVecReg(PhysRegIdPtr phys_reg, const VecRegContainer& val) function in class:PhysRegFile
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H A D | dyn_inst.hh | 404 this->cpu->setVecReg(this->_destRegIdx[idx], val);
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H A D | thread_context.hh | 326 setVecReg(const RegId& reg, const VecRegContainer& val) override
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H A D | cpu.cc | 1283 FullO3CPU<Impl>::setVecReg(PhysRegIdPtr phys_reg, const VecRegContainer& val) function in class:FullO3CPU 1286 regFile.setVecReg(phys_reg, val); 1426 setVecReg(phys_reg, val);
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H A D | cpu.hh | 416 void setVecReg(PhysRegIdPtr reg_idx, const VecRegContainer& val);
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/gem5/src/cpu/ |
H A D | thread_context.hh | 257 virtual void setVecReg(const RegId& reg, const VecRegContainer& val) = 0;
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H A D | simple_thread.hh | 482 setVecReg(const RegId ®, const VecRegContainer &val) override
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/gem5/src/cpu/minor/ |
H A D | exec_context.hh | 221 thread.setVecReg(reg, val);
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/gem5/src/cpu/simple/ |
H A D | exec_context.hh | 246 thread->setVecReg(reg, val);
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