Searched refs:AbstractController (Results 1 - 10 of 10) sorted by relevance

/gem5/src/mem/ruby/slicc_interface/
H A DAbstractController.cc41 #include "mem/ruby/slicc_interface/AbstractController.hh"
51 AbstractController::AbstractController(const Params *p) function in class:AbstractController
70 AbstractController::init()
82 AbstractController::resetStats()
92 AbstractController::regStats()
103 AbstractController::profileMsgDelay(uint32_t virtualNetwork, Cycles delay)
111 AbstractController::stallBuffer(MessageBuffer* buf, Addr addr)
125 AbstractController::wakeUpBuffers(Addr addr)
146 AbstractController
[all...]
H A DAbstractController.hh73 class AbstractController : public ClockedObject, public Consumer class in inherits:ClockedObject,Consumer
77 AbstractController(const Params *p);
221 AbstractController *ctr;
225 StatsCallback(AbstractController *_ctr) : ctr(_ctr) {}
241 AbstractController *controller;
244 MemoryPort(const std::string &_name, AbstractController *_controller,
/gem5/src/mem/ruby/system/
H A DRubySystem.hh42 #include "mem/ruby/slicc_interface/AbstractController.hh"
48 class AbstractController;
94 void registerAbstractController(AbstractController*);
134 std::vector<AbstractController *> m_abs_cntrl_vec;
140 std::vector<std::map<uint32_t, AbstractController *> > m_abstract_controls;
H A DRubyPort.hh56 class AbstractController;
163 void setController(AbstractController* _cntrl) { m_controller = _cntrl; }
187 AbstractController* m_controller;
H A DRubySystem.cc87 RubySystem::registerAbstractController(AbstractController* cntrl)
H A DRubyPort.cc49 #include "mem/ruby/slicc_interface/AbstractController.hh"
340 AbstractController *directory =
/gem5/src/mem/ruby/structures/
H A DPrefetcher.hh39 #include "mem/ruby/slicc_interface/AbstractController.hh"
109 void setController(AbstractController *_ctrl)
192 AbstractController *m_controller;
/gem5/src/mem/ruby/profiler/
H A DProfiler.cc359 for (map<uint32_t, AbstractController*>::iterator it =
363 AbstractController *ctr = (*it).second;
373 for (map<uint32_t, AbstractController*>::iterator it =
377 AbstractController *ctr = (*it).second;
392 for (map<uint32_t, AbstractController*>::iterator it =
396 AbstractController *ctr = (*it).second;
/gem5/src/mem/ruby/network/
H A DNetwork.cc87 AbstractController *abs_cntrl = ext_link->params()->ext_node;
H A DTopology.cc38 #include "mem/ruby/slicc_interface/AbstractController.hh"
72 AbstractController *abs_cntrl = ext_link->params()->ext_node;

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