Searched refs:delay (Results 26 - 50 of 143) sorted by relevance

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/gem5/ext/mcpat/cacti/
H A Dwire.cc149 delay = global.delay * wire_length;
160 delay = global_5.delay * wire_length;
171 delay = global_10.delay * wire_length;
182 delay = global_20.delay * wire_length;
193 delay = global_30.delay * wire_lengt
720 wire_model(double space, double size, double *delay) argument
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H A Duca.cc121 // delay calculation
140 double delay_array_to_mat = htree_in_add->delay + bank.htree_in_add->delay;
141 double max_delay_before_row_decoder = delay_array_to_mat + bank.mat.r_predec->delay;
143 bank.mat.sa_mux_lev_1_predec->delay +
144 bank.mat.sa_mux_lev_1_dec->delay;
146 bank.mat.sa_mux_lev_2_predec->delay +
147 bank.mat.sa_mux_lev_2_dec->delay;
148 double delay_inside_mat = bank.mat.row_dec->delay + bank.mat.delay_bitline + bank.mat.delay_sa;
152 delay_array_to_mat + bank.mat.b_mux_predec->delay
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H A Dcomponent.h57 double delay; member in class:Component
/gem5/src/dev/
H A Ddma_device.hh85 * if present, potentially with a delay added to it.
88 * @param delay Additional delay for scheduling the completion event
90 void handleResp(PacketPtr pkt, Tick delay = 0);
104 /** Amount to delay completion of dma by */
105 const Tick delay; member in struct:DmaPort::DmaReqState
108 : completionEvent(ce), totBytes(tb), numBytes(0), delay(_delay)
157 uint8_t *data, Tick delay, Request::Flags flag = 0);
161 uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
180 uint32_t sid, uint32_t ssid, Tick delay
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H A Dio_device.hh72 // Technically the packet only reaches us after the header delay,
77 const Tick delay = variable
80 return delay + receive_delay;
/gem5/src/systemc/tests/systemc/misc/unit/control/wait/
H A Dwait.cpp59 sc_time delay(10, SC_US);
60 SC_WAITN(delay);
78 sc_time delay(10, SC_US);
79 wait(delay); // 1st
82 SC_WAITN(delay); // Wait some time
83 wait(delay); // 2nd
86 wait(delay); // 3rd
89 wait(delay); // 4th
107 sc_assert(thread->file == NULL); // 1st wait(delay)
115 sc_assert(thread->file == NULL); // 2nd wait(delay)
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/gem5/util/systemc/systemc_within_gem5/systemc_simple_object/
H A Dconfig.py40 parser.add_argument('--delay', default='1ns')
50 feeder.delay = args.delay
/gem5/src/systemc/tests/systemc/1666-2011-compliance/stepwise_simulation/
H A Dstepwise_simulation.cpp41 const sc_time delay( 10, SC_NS );
68 next_trigger( delay/2 );
127 dut.ev[i].notify( (i+1) * delay );
130 sc_assert( sc_time_to_pending_activity() == delay );
/gem5/src/mem/
H A DSerialLink.py57 delay = Param.Latency('0ns', "The latency of this serial_link") variable in class:SerialLink
/gem5/src/systemc/tlm_bridge/
H A Dgem5_to_tlm.cc130 sc_core::sc_time delay; local
172 sc_core::sc_time delay = sc_core::SC_ZERO_TIME; local
173 socket->nb_transport_fw(trans, fw_phase, delay);
224 sc_core::sc_time delay = sc_core::SC_ZERO_TIME; local
228 socket->b_transport(*trans, delay);
236 return delay.value();
247 sc_core::sc_time delay = sc_core::SC_ZERO_TIME; local
254 socket->b_transport(*trans, delay);
269 return delay.value();
321 * The header delay mark
339 auto delay = sc_core::sc_time::from_value(packet->payloadDelay); local
405 sc_core::sc_time delay = sc_core::SC_ZERO_TIME; local
432 nb_transport_bw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &delay) argument
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H A Dsc_peq.hh83 const sc_core::sc_time& delay)
94 Tick nextEventTick = sc_core::sc_time_stamp().value() + delay.value();
82 notify(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase, const sc_core::sc_time& delay) argument
/gem5/src/systemc/tests/systemc/tmp/others/sc_writer_bug/
H A Dsc_writer_bug.cpp17 sc_time delay; member in struct:M
21 , delay(_delay)
28 wait(delay);
/gem5/src/dev/net/
H A Detherbus.cc103 int delay = (int)ceil(((double)pkt->simLength * ticksPerByte) + 1.0); local
104 DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n",
105 delay, ticksPerByte);
106 schedule(event, curTick() + delay);
H A Detherlink.cc73 p->delay, p->delay_var, p->dump);
75 p->delay, p->delay_var, p->dump);
110 double rate, Tick delay, Tick delay_var, EtherDump *d)
112 ticksPerByte(rate), linkDelay(delay), delayVar(delay_var), dump(d),
146 DPRINTF(Ethernet, "packet delayed: delay=%d\n", linkDelay);
190 Tick delay = (Tick)ceil(((double)pkt->simLength * ticksPerByte) + 1.0); local
192 delay += random_mt.random<Tick>(0, delayVar);
194 DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n",
195 delay, ticksPerByte);
196 parent->schedule(doneEvent, curTick() + delay);
109 Link(const string &name, EtherLink *p, int num, double rate, Tick delay, Tick delay_var, EtherDump *d) argument
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/gem5/ext/mcpat/
H A Dinterconnect.cc81 while (delay > latency &&
88 if (delay > latency) {
96 while (delay > throughput &&
103 if (delay > throughput) {
105 num_pipe_stages = (int)ceil(delay / throughput);
107 delay = delay / num_pipe_stages + num_pipe_stages * 0.05 * delay;
155 delay = wtemp1->delay;
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/gem5/src/systemc/tests/systemc/misc/communication/channel/dataflow/
H A Ddataflow.cpp74 SC_MODULE( delay )
76 SC_HAS_PROCESS( delay );
83 delay( sc_module_name NAME, function
97 void delay::entry()
213 delay D1("D1", clock, st1, a1);
219 delay D2("D2", clock, b2, b3);
/gem5/ext/systemc/src/tlm_utils/
H A Dtlm2_base_protocol_checker.h199 tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay)
204 nb_transport_fw_pre_checks( trans, phase, delay );
207 status = initiator_socket->nb_transport_fw( trans, phase, delay );
210 nb_transport_fw_post_checks( trans, start_phase, phase, delay, status );
216 tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay)
219 nb_transport_bw_pre_checks( trans, phase, delay );
222 status = target_socket->nb_transport_bw( trans, phase, delay );
225 nb_transport_bw_post_checks( trans, phase, delay, status );
230 virtual void b_transport( tlm::tlm_generic_payload& trans, sc_core::sc_time& delay )
233 b_transport_pre_checks( trans, delay );
198 nb_transport_fw( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay) argument
215 nb_transport_bw( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay) argument
345 b_transport_pre_checks( tlm::tlm_generic_payload& trans, sc_core::sc_time& delay) argument
374 b_transport_post_checks( tlm::tlm_generic_payload& trans, sc_core::sc_time& delay) argument
384 nb_transport_fw_pre_checks( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay) argument
455 nb_transport_fw_post_checks( tlm::tlm_generic_payload& trans, tlm::tlm_phase& start_phase, tlm::tlm_phase& phase, sc_core::sc_time& delay, tlm::tlm_sync_enum status) argument
483 nb_transport_bw_pre_checks( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay) argument
502 nb_transport_bw_post_checks( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay, tlm::tlm_sync_enum status) argument
562 nb_transport_response_checks( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_core::sc_time& delay, const char* txt2, const char* txt3, const char* txt4) argument
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/gem5/src/cpu/testers/traffic_gen/
H A Dlinear_gen.hh103 Tick nextPacketTick(bool elastic, Tick delay) const;
H A Drandom_gen.hh98 Tick nextPacketTick(bool elastic, Tick delay) const;
/gem5/src/cpu/
H A Dtranslation.hh68 bool delay; member in class:WholeTranslationState
83 : outstanding(1), delay(false), isSplit(false), mainReq(_req),
98 : outstanding(2), delay(false), isSplit(true), mainReq(_req),
244 state->delay = true;
/gem5/src/mem/cache/
H A Dmshr_queue.hh110 * Adds a delay to the provided MSHR and moves MSHRs that will be
114 * @param delay_ticks ticks of the desired delay
116 void delay(MSHR *mshr, Tick delay_ticks);
/gem5/util/tlm/src/
H A Dsc_peq.hh83 const sc_core::sc_time& delay)
94 Tick nextEventTick = sc_core::sc_time_stamp().value() + delay.value();
82 notify(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase, const sc_core::sc_time& delay) argument
/gem5/util/tlm/examples/slave_port/
H A Dsc_target.hh73 sc_time& delay);
78 sc_time& delay);
/gem5/src/dev/arm/
H A Dgic_v3.cc106 Tick delay = 0; local
112 delay = params()->dist_pio_delay;
122 delay = params()->redist_pio_delay;
133 return delay;
143 Tick delay = 0; local
152 delay = params()->dist_pio_delay;
164 delay = params()->redist_pio_delay;
170 return delay;
/gem5/src/sim/
H A Dpseudo_inst.cc303 m5exit(ThreadContext *tc, Tick delay) argument
305 DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
306 if (DistIface::readyToExit(delay)) {
307 Tick when = curTick() + delay * SimClock::Int::ns;
313 m5fail(ThreadContext *tc, Tick delay, uint64_t code) argument
315 DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
316 Tick when = curTick() + delay * SimClock::Int::ns;
435 resetstats(ThreadContext *tc, Tick delay, Tick period) argument
437 DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
442 Tick when = curTick() + delay * SimCloc
449 dumpstats(ThreadContext *tc, Tick delay, Tick period) argument
463 dumpresetstats(ThreadContext *tc, Tick delay, Tick period) argument
477 m5checkpoint(ThreadContext *tc, Tick delay, Tick period) argument
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