| /gem5/src/arch/alpha/ |
| H A D | stacktrace.hh | 72 bool decodeSave(MachInst inst, int ®, int &disp);
73 bool decodeStack(MachInst inst, int &disp);
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| H A D | decoder.hh | 67 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
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| H A D | system.cc | 198 uint32_t i2 = virtProxy.read<uint32_t>(addr + sizeof(MachInst));
202 Addr new_addr = addr + 2 * sizeof(MachInst);
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| H A D | ev5.hh | 105 inline int Opcode(MachInst inst) { return inst >> 26 & 0x3f; }
106 inline int Ra(MachInst inst) { return inst >> 21 & 0x1f; }
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| /gem5/src/arch/x86/ |
| H A D | stacktrace.hh | 71 bool decodeSave(MachInst inst, int ®, int &disp);
72 bool decodeStack(MachInst inst, int &disp);
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| H A D | decoder.hh | 75 std::vector<MachInst> chunks;
76 std::vector<MachInst> masks;
86 MachInst fetchChunk;
117 int remaining = sizeof(MachInst) - offset;
136 assert(offset <= sizeof(MachInst));
137 if (offset == sizeof(MachInst)) {
146 basePC += sizeof(MachInst);
308 void moreBytes(const PCState &pc, Addr fetchPC, MachInst data)
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| H A D | stacktrace.cc | 141 StackTrace::decodeStack(MachInst inst, int &disp)
148 StackTrace::decodeSave(MachInst inst, int ®, int &disp)
166 for (Addr pc = func; pc < callpc; pc += sizeof(MachInst)) {
167 MachInst inst = tc->getVirtProxy().read<MachInst>(pc);
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| H A D | types.hh | 54 typedef uint64_t MachInst; typedef in namespace:X86ISA
289 class PCState : public GenericISA::UPCState<MachInst>
292 typedef GenericISA::UPCState<MachInst> Base;
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| /gem5/src/arch/riscv/ |
| H A D | stacktrace.cc | 97 StackTrace::decodeStack(MachInst inst, int &disp)
104 StackTrace::decodeSave(MachInst inst, int ®, int &disp)
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| H A D | stacktrace.hh | 67 bool decodeSave(MachInst inst, int ®, int &disp);
68 bool decodeStack(MachInst inst, int &disp);
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| H A D | decoder.hh | 71 void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
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| /gem5/src/arch/power/ |
| H A D | stacktrace.cc | 98 StackTrace::decodeStack(MachInst inst, int &disp)
105 StackTrace::decodeSave(MachInst inst, int ®, int &disp)
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| H A D | stacktrace.hh | 67 bool decodeSave(MachInst inst, int ®, int &disp);
68 bool decodeStack(MachInst inst, int &disp);
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| /gem5/src/arch/mips/ |
| H A D | decoder.hh | 69 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
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| H A D | types.hh | 40 typedef uint32_t MachInst; typedef in namespace:MipsISA
43 typedef GenericISA::DelaySlotPCState<MachInst> PCState;
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| H A D | faults.cc | 122 bool delay_slot = pc.pc() + sizeof(MachInst) != pc.npc();
124 pc.pc() - (delay_slot ? sizeof(MachInst) : 0));
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| /gem5/src/arch/power/insts/ |
| H A D | static_inst.hh | 45 PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
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| H A D | floating.hh | 52 FloatOp(const char *mnem, MachInst _machInst, OpClass __opClass)
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| /gem5/src/arch/arm/ |
| H A D | decoder.cc | 149 assert(offset <= sizeof(MachInst) || emi.decoderFault);
150 if (offset == sizeof(MachInst))
155 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
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| H A D | stacktrace.cc | 141 StackTrace::decodeStack(MachInst inst, int &disp)
147 StackTrace::decodeSave(MachInst inst, int ®, int &disp)
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| /gem5/src/arch/arm/tracers/ |
| H A D | tarmac_base.hh | 94 ArmISA::MachInst opcode;
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| /gem5/src/arch/sparc/ |
| H A D | remote_gdb.cc | 216 pc.nnpc(pc.npc() + sizeof(MachInst));
232 pc.nnpc(pc.npc() + sizeof(MachInst));
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| H A D | process.cc | 393 spillStart = fillStart + sizeof(MachInst) * numFillInsts;
419 fillHandler64, sizeof(MachInst) * numFillInsts);
421 spillHandler64, sizeof(MachInst) * numSpillInsts);
431 fillHandler32, sizeof(MachInst) * numFillInsts);
433 spillHandler32, sizeof(MachInst) * numSpillInsts);
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| /gem5/src/arch/alpha/linux/ |
| H A D | system.cc | 153 addr + sizeof(MachInst) * 6);
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| /gem5/src/cpu/simple/ |
| H A D | base.hh | 106 TheISA::MachInst inst;
|