111723Sar4jc@virginia.edu/* 211723Sar4jc@virginia.edu * Copyright (c) 2012 Google 312120Sar4jc@virginia.edu * Copyright (c) 2017 The University of Virginia 411723Sar4jc@virginia.edu * All rights reserved. 511723Sar4jc@virginia.edu * 611723Sar4jc@virginia.edu * Redistribution and use in source and binary forms, with or without 711723Sar4jc@virginia.edu * modification, are permitted provided that the following conditions are 811723Sar4jc@virginia.edu * met: redistributions of source code must retain the above copyright 911723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer; 1011723Sar4jc@virginia.edu * redistributions in binary form must reproduce the above copyright 1111723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer in the 1211723Sar4jc@virginia.edu * documentation and/or other materials provided with the distribution; 1311723Sar4jc@virginia.edu * neither the name of the copyright holders nor the names of its 1411723Sar4jc@virginia.edu * contributors may be used to endorse or promote products derived from 1511723Sar4jc@virginia.edu * this software without specific prior written permission. 1611723Sar4jc@virginia.edu * 1711723Sar4jc@virginia.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1811723Sar4jc@virginia.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1911723Sar4jc@virginia.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2011723Sar4jc@virginia.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2111723Sar4jc@virginia.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2211723Sar4jc@virginia.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2311723Sar4jc@virginia.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2411723Sar4jc@virginia.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2511723Sar4jc@virginia.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2611723Sar4jc@virginia.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2711723Sar4jc@virginia.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2811723Sar4jc@virginia.edu * 2911723Sar4jc@virginia.edu * Authors: Gabe Black 3012120Sar4jc@virginia.edu * Alec Roelke 3111723Sar4jc@virginia.edu */ 3211723Sar4jc@virginia.edu 3311723Sar4jc@virginia.edu#ifndef __ARCH_RISCV_DECODER_HH__ 3411723Sar4jc@virginia.edu#define __ARCH_RISCV_DECODER_HH__ 3511723Sar4jc@virginia.edu 3611723Sar4jc@virginia.edu#include "arch/generic/decode_cache.hh" 3712120Sar4jc@virginia.edu#include "arch/riscv/isa_traits.hh" 3811723Sar4jc@virginia.edu#include "arch/riscv/types.hh" 3912334Sgabeblack@google.com#include "base/logging.hh" 4011723Sar4jc@virginia.edu#include "base/types.hh" 4111723Sar4jc@virginia.edu#include "cpu/static_inst.hh" 4212120Sar4jc@virginia.edu#include "debug/Decode.hh" 4311723Sar4jc@virginia.edu 4411723Sar4jc@virginia.edunamespace RiscvISA 4511723Sar4jc@virginia.edu{ 4611723Sar4jc@virginia.edu 4711723Sar4jc@virginia.educlass ISA; 4811723Sar4jc@virginia.educlass Decoder 4911723Sar4jc@virginia.edu{ 5012120Sar4jc@virginia.edu private: 5112621Sgabeblack@google.com DecodeCache::InstMap<ExtMachInst> instMap; 5212136Sar4jc@virginia.edu bool aligned; 5312120Sar4jc@virginia.edu bool mid; 5412136Sar4jc@virginia.edu bool more; 5512120Sar4jc@virginia.edu 5611723Sar4jc@virginia.edu protected: 5711723Sar4jc@virginia.edu //The extended machine instruction being generated 5811723Sar4jc@virginia.edu ExtMachInst emi; 5911723Sar4jc@virginia.edu bool instDone; 6011723Sar4jc@virginia.edu 6111723Sar4jc@virginia.edu public: 6212136Sar4jc@virginia.edu Decoder(ISA* isa=nullptr) { reset(); } 6311723Sar4jc@virginia.edu 6412120Sar4jc@virginia.edu void process() {} 6512136Sar4jc@virginia.edu void reset(); 6612136Sar4jc@virginia.edu 6712136Sar4jc@virginia.edu inline bool compressed(ExtMachInst inst) { return (inst & 0x3) < 0x3; } 6811723Sar4jc@virginia.edu 6911723Sar4jc@virginia.edu //Use this to give data to the decoder. This should be used 7011723Sar4jc@virginia.edu //when there is control flow. 7112120Sar4jc@virginia.edu void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst); 7211723Sar4jc@virginia.edu 7312136Sar4jc@virginia.edu bool needMoreBytes() { return more; } 7412120Sar4jc@virginia.edu bool instReady() { return instDone; } 7511723Sar4jc@virginia.edu void takeOverFrom(Decoder *old) {} 7611723Sar4jc@virginia.edu 7711723Sar4jc@virginia.edu StaticInstPtr decodeInst(ExtMachInst mach_inst); 7811723Sar4jc@virginia.edu 7911723Sar4jc@virginia.edu /// Decode a machine instruction. 8011723Sar4jc@virginia.edu /// @param mach_inst The binary instruction to decode. 8111723Sar4jc@virginia.edu /// @retval A pointer to the corresponding StaticInst object. 8212120Sar4jc@virginia.edu StaticInstPtr decode(ExtMachInst mach_inst, Addr addr); 8311723Sar4jc@virginia.edu 8412120Sar4jc@virginia.edu StaticInstPtr decode(RiscvISA::PCState &nextPC); 8511723Sar4jc@virginia.edu}; 8611723Sar4jc@virginia.edu 8711723Sar4jc@virginia.edu} // namespace RiscvISA 8811723Sar4jc@virginia.edu 8911723Sar4jc@virginia.edu#endif // __ARCH_RISCV_DECODER_HH__ 90