16691Stjones1@inf.ed.ac.uk/*
26691Stjones1@inf.ed.ac.uk * Copyright (c) 2009 The University of Edinburgh
36691Stjones1@inf.ed.ac.uk * All rights reserved.
46691Stjones1@inf.ed.ac.uk *
56691Stjones1@inf.ed.ac.uk * Redistribution and use in source and binary forms, with or without
66691Stjones1@inf.ed.ac.uk * modification, are permitted provided that the following conditions are
76691Stjones1@inf.ed.ac.uk * met: redistributions of source code must retain the above copyright
86691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer;
96691Stjones1@inf.ed.ac.uk * redistributions in binary form must reproduce the above copyright
106691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer in the
116691Stjones1@inf.ed.ac.uk * documentation and/or other materials provided with the distribution;
126691Stjones1@inf.ed.ac.uk * neither the name of the copyright holders nor the names of its
136691Stjones1@inf.ed.ac.uk * contributors may be used to endorse or promote products derived from
146691Stjones1@inf.ed.ac.uk * this software without specific prior written permission.
156691Stjones1@inf.ed.ac.uk *
166691Stjones1@inf.ed.ac.uk * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
176691Stjones1@inf.ed.ac.uk * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
186691Stjones1@inf.ed.ac.uk * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
196691Stjones1@inf.ed.ac.uk * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
206691Stjones1@inf.ed.ac.uk * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
216691Stjones1@inf.ed.ac.uk * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
226691Stjones1@inf.ed.ac.uk * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
236691Stjones1@inf.ed.ac.uk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
246691Stjones1@inf.ed.ac.uk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
256691Stjones1@inf.ed.ac.uk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
266691Stjones1@inf.ed.ac.uk * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
276691Stjones1@inf.ed.ac.uk *
286691Stjones1@inf.ed.ac.uk * Authors: Timothy M. Jones
296691Stjones1@inf.ed.ac.uk */
306691Stjones1@inf.ed.ac.uk
316691Stjones1@inf.ed.ac.uk#ifndef __ARCH_POWER_INSTS_STATICINST_HH__
326691Stjones1@inf.ed.ac.uk#define __ARCH_POWER_INSTS_STATICINST_HH__
336691Stjones1@inf.ed.ac.uk
346691Stjones1@inf.ed.ac.uk#include "base/trace.hh"
356691Stjones1@inf.ed.ac.uk#include "cpu/static_inst.hh"
366691Stjones1@inf.ed.ac.uk
376691Stjones1@inf.ed.ac.uknamespace PowerISA
386691Stjones1@inf.ed.ac.uk{
396691Stjones1@inf.ed.ac.uk
406691Stjones1@inf.ed.ac.ukclass PowerStaticInst : public StaticInst
416691Stjones1@inf.ed.ac.uk{
426691Stjones1@inf.ed.ac.uk  protected:
436691Stjones1@inf.ed.ac.uk
446691Stjones1@inf.ed.ac.uk    // Constructor
456691Stjones1@inf.ed.ac.uk    PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
466691Stjones1@inf.ed.ac.uk        : StaticInst(mnem, _machInst, __opClass)
476691Stjones1@inf.ed.ac.uk    {
486691Stjones1@inf.ed.ac.uk    }
496691Stjones1@inf.ed.ac.uk
506691Stjones1@inf.ed.ac.uk    // Insert a condition value into a CR (condition register) field
516691Stjones1@inf.ed.ac.uk    inline uint32_t
526691Stjones1@inf.ed.ac.uk    insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
536691Stjones1@inf.ed.ac.uk    {
546691Stjones1@inf.ed.ac.uk        uint32_t bits = value << ((7 - bf) * 4);
556691Stjones1@inf.ed.ac.uk        uint32_t mask = ~(0xf << ((7 - bf) * 4));
566691Stjones1@inf.ed.ac.uk        return (cr & mask) | bits;
576691Stjones1@inf.ed.ac.uk    }
586691Stjones1@inf.ed.ac.uk
596691Stjones1@inf.ed.ac.uk    /// Print a register name for disassembly given the unique
606691Stjones1@inf.ed.ac.uk    /// dependence tag number (FP or int).
616691Stjones1@inf.ed.ac.uk    void
6212104Snathanael.premillieu@arm.com    printReg(std::ostream &os, RegId reg) const;
636691Stjones1@inf.ed.ac.uk
6412616Sgabeblack@google.com    std::string generateDisassembly(
6512616Sgabeblack@google.com            Addr pc, const SymbolTable *symtab) const override;
667720Sgblack@eecs.umich.edu
677720Sgblack@eecs.umich.edu    void
6812616Sgabeblack@google.com    advancePC(PowerISA::PCState &pcState) const override
697720Sgblack@eecs.umich.edu    {
707720Sgblack@eecs.umich.edu        pcState.advance();
717720Sgblack@eecs.umich.edu    }
7212614Sgabeblack@google.com
7312614Sgabeblack@google.com    size_t
7412614Sgabeblack@google.com    asBytes(void *buf, size_t max_size) override
7512614Sgabeblack@google.com    {
7612614Sgabeblack@google.com        return simpleAsBytes(buf, max_size, machInst);
7712614Sgabeblack@google.com    }
786691Stjones1@inf.ed.ac.uk};
796691Stjones1@inf.ed.ac.uk
807811Ssteve.reinhardt@amd.com} // namespace PowerISA
816691Stjones1@inf.ed.ac.uk
826691Stjones1@inf.ed.ac.uk#endif //__ARCH_POWER_INSTS_STATICINST_HH__
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