Searched hist:7649 (Results 1 - 7 of 7) sorted by relevance
| /gem5/src/arch/alpha/ | ||
| H A D | registers.hh | diff 7649:a6a6177a5ffa Wed Aug 25 20:10:00 EDT 2010 Min Kyu Jeong <minkyu.jeong@arm.com> ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
| /gem5/src/arch/power/ | ||
| H A D | registers.hh | diff 7649:a6a6177a5ffa Wed Aug 25 20:10:00 EDT 2010 Min Kyu Jeong <minkyu.jeong@arm.com> ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
| /gem5/src/arch/sparc/ | ||
| H A D | registers.hh | diff 7649:a6a6177a5ffa Wed Aug 25 20:10:00 EDT 2010 Min Kyu Jeong <minkyu.jeong@arm.com> ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
| /gem5/src/arch/mips/ | ||
| H A D | registers.hh | diff 7649:a6a6177a5ffa Wed Aug 25 20:10:00 EDT 2010 Min Kyu Jeong <minkyu.jeong@arm.com> ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
| /gem5/src/arch/x86/ | ||
| H A D | registers.hh | diff 7649:a6a6177a5ffa Wed Aug 25 20:10:00 EDT 2010 Min Kyu Jeong <minkyu.jeong@arm.com> ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
| /gem5/src/arch/arm/ | ||
| H A D | registers.hh | diff 7649:a6a6177a5ffa Wed Aug 25 20:10:00 EDT 2010 Min Kyu Jeong <minkyu.jeong@arm.com> ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
| /gem5/src/cpu/o3/ | ||
| H A D | rename_impl.hh | diff 7649:a6a6177a5ffa Wed Aug 25 20:10:00 EDT 2010 Min Kyu Jeong <minkyu.jeong@arm.com> ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
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