1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder.  You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated
12 * unmodified and in its entirety in all distributions of the software,
13 * modified or unmodified, in source code or in binary form.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are
17 * met: redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer;
19 * redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution;
22 * neither the name of the copyright holders nor the names of its
23 * contributors may be used to endorse or promote products derived from
24 * this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * Authors: Gabe Black
39 */
40
41#ifndef __ARCH_X86_REGISTERS_HH__
42#define __ARCH_X86_REGISTERS_HH__
43
44#include "arch/generic/vec_pred_reg.hh"
45#include "arch/generic/vec_reg.hh"
46#include "arch/x86/generated/max_inst_regs.hh"
47#include "arch/x86/regs/int.hh"
48#include "arch/x86/regs/ccr.hh"
49#include "arch/x86/regs/misc.hh"
50#include "arch/x86/x86_traits.hh"
51
52namespace X86ISA
53{
54using X86ISAInst::MaxInstSrcRegs;
55using X86ISAInst::MaxInstDestRegs;
56using X86ISAInst::MaxMiscDestRegs;
57const int NumMiscRegs = NUM_MISCREGS;
58
59const int NumIntArchRegs = NUM_INTREGS;
60const int NumIntRegs = NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs;
61const int NumCCRegs = NUM_CCREGS;
62
63#define ISA_HAS_CC_REGS
64
65// Each 128 bit xmm register is broken into two effective 64 bit registers.
66// Add 8 for the indices that are mapped over the fp stack
67const int NumFloatRegs =
68    NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8;
69
70// These enumerate all the registers for dependence tracking.
71enum DependenceTags {
72    // FP_Reg_Base must be large enough to be bigger than any integer
73    // register index which has the IntFoldBit (1 << 6) set.  To be safe
74    // we just start at (1 << 7) == 128.
75    FP_Reg_Base = 128,
76    CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
77    Misc_Reg_Base = CC_Reg_Base + NumCCRegs,
78    Max_Reg_Index = Misc_Reg_Base + NumMiscRegs
79};
80
81const int NumVecRegs = 1;  // Not applicable to x86
82                           // (1 to prevent warnings)
83const int NumVecPredRegs = 1;  // Not applicable to x86
84                               // (1 to prevent warnings)
85
86// semantically meaningful register indices
87//There is no such register in X86
88const int ZeroReg = NUM_INTREGS;
89const int StackPointerReg = INTREG_RSP;
90//X86 doesn't seem to have a link register
91const int ReturnAddressReg = 0;
92const int ReturnValueReg = INTREG_RAX;
93const int FramePointerReg = INTREG_RBP;
94
95// Some OS syscalls use a second register (rdx) to return a second
96// value
97const int SyscallPseudoReturnReg = INTREG_RDX;
98
99// Not applicable to x86
100using VecElem = ::DummyVecElem;
101using VecReg = ::DummyVecReg;
102using ConstVecReg = ::DummyConstVecReg;
103using VecRegContainer = ::DummyVecRegContainer;
104constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
105constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
106
107// Not applicable to x86
108using VecPredReg = ::DummyVecPredReg;
109using ConstVecPredReg = ::DummyConstVecPredReg;
110using VecPredRegContainer = ::DummyVecPredRegContainer;
111constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
112constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
113
114} // namespace X86ISA
115
116#endif // __ARCH_X86_REGFILE_HH__
117