1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32#ifndef __ARCH_SPARC_REGISTERS_HH__
33#define __ARCH_SPARC_REGISTERS_HH__
34
35#include "arch/generic/vec_pred_reg.hh"
36#include "arch/generic/vec_reg.hh"
37#include "arch/sparc/generated/max_inst_regs.hh"
38#include "arch/sparc/miscregs.hh"
39#include "arch/sparc/sparc_traits.hh"
40#include "base/types.hh"
41
42namespace SparcISA
43{
44
45using SparcISAInst::MaxInstSrcRegs;
46using SparcISAInst::MaxInstDestRegs;
47using SparcISAInst::MaxMiscDestRegs;
48
49// Not applicable to SPARC
50using VecElem = ::DummyVecElem;
51using VecReg = ::DummyVecReg;
52using ConstVecReg = ::DummyConstVecReg;
53using VecRegContainer = ::DummyVecRegContainer;
54constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
55constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
56
57// Not applicable to SPARC
58using VecPredReg = ::DummyVecPredReg;
59using ConstVecPredReg = ::DummyConstVecPredReg;
60using VecPredRegContainer = ::DummyVecPredRegContainer;
61constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
62constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
63
64// semantically meaningful register indices
65const int ZeroReg = 0;      // architecturally meaningful
66// the rest of these depend on the ABI
67const int ReturnAddressReg = 31; // post call, precall is 15
68const int ReturnValueReg = 8;  // Post return, 24 is pre-return.
69const int StackPointerReg = 14;
70const int FramePointerReg = 30;
71
72// Some OS syscall use a second register (o1) to return a second value
73const int SyscallPseudoReturnReg = 9;
74
75const int NumIntArchRegs = 32;
76const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
77const int NumVecRegs = 1;  // Not applicable to SPARC
78                           // (1 to prevent warnings)
79const int NumVecPredRegs = 1;  // Not applicable to SPARC
80                               // (1 to prevent warnings)
81const int NumCCRegs = 0;
82
83const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
84
85} // namespace SparcISA
86
87#endif
88