Searched hist:31 (Results 101 - 125 of 1011) sorted by relevance
| /gem5/src/learning_gem5/part2/ | ||
| H A D | simple_memobj.hh | diff 14252:1659a606447f Fri Sep 06 19:31:00 EDT 2019 Gabe Black <gabeblack@google.com> dev: Scrub out some lingering uses of MemObject. MemObject doesn't do anything any more, and is basically just an alias for ClockedObject. Change-Id: Ic0e1658609e4e1d7f4b829fbc421f222e4869dee Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20719 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| /gem5/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/ | ||
| H A D | system.pc.com_1.terminal | diff 10639:469cf1ea40f5 Wed Jan 07 03:31:00 EST 2015 Gabe Black <gabeblack@google.com> stats: x86: Update stats for the CPUID change. diff 9125:65423863d963 Sun Jul 22 21:31:00 EDT 2012 Nilay Vaish <nilay@cs.wisc.edu> Regression: Update stats due to changes to x86 cpuid instruction |
| H A D | simerr | diff 9125:65423863d963 Sun Jul 22 21:31:00 EDT 2012 Nilay Vaish <nilay@cs.wisc.edu> Regression: Update stats due to changes to x86 cpuid instruction |
| /gem5/src/base/ | ||
| H A D | inifile.cc | diff 5202:ff56fa8c2091 Wed Oct 31 21:04:00 EDT 2007 Steve Reinhardt <stever@gmail.com> String constant const-ness changes to placate g++ 4.2. Also some bug fixes in MIPS ISA uncovered by g++ warnings (Python string compares don't work in C++!). diff 2665:a124942bacb8 Wed May 31 19:26:00 EDT 2006 Ali Saidi <saidi@eecs.umich.edu> Updated Authors from bk prs info |
| /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/ | ||
| H A D | stats.txt | diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak diff 11353:31c5786945b4 Wed Feb 24 04:16:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to reflect forwarding of InvalidateReq |
| /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/ | ||
| H A D | stats.txt | diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak diff 11353:31c5786945b4 Wed Feb 24 04:16:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to reflect forwarding of InvalidateReq |
| /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/ | ||
| H A D | stats.txt | diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak diff 11353:31c5786945b4 Wed Feb 24 04:16:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to reflect forwarding of InvalidateReq |
| /gem5/src/kern/solaris/ | ||
| H A D | solaris.hh | diff 8808:8af87554ad7e Tue Jan 31 00:07:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> Merge with main repository. diff 2665:a124942bacb8 Wed May 31 19:26:00 EDT 2006 Ali Saidi <saidi@eecs.umich.edu> Updated Authors from bk prs info |
| /gem5/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/tests/quick/se/50.vortex/ref/sparc/linux/simple-atomic/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/ | ||
| H A D | stats.txt | diff 11507:be6065c1d8d2 Tue May 31 11:55:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update and fix e273e86a873d diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak |
| /gem5/src/arch/x86/isa/ | ||
| H A D | bitfields.isa | diff 12045:31d9a81ba286 Wed May 24 06:09:00 EDT 2017 Gabe Black <gabeblack@google.com> x86: Rework how VEX prefixes are decoded. Remove redundant information from the ExtMachInst, hash the vex information to ensure the decode cache works properly, print the vex info when printing an ExtMachInst, consider the vex info when comparing two ExtMachInsts, fold the info from the vex prefixes into existing settings, remove redundant decode code, handle vex prefixes one byte at a time and don't bother building up the entire prefix, and let instructions that care about vex use it in their implementation, instead of developing an entire parallel decode tree. This also eliminates the error prone vex immediate decode table which was incomplete and would result in an out of bounds access for incorrectly encoded instructions or when the CPU was mispeculating, as it was (as far as I can tell) redundant with the tables that already existed for two and three byte opcodes. There were differences, but I think those may have been mistakes based on the documentation I found. Also, in 32 bit mode, the VEX prefixes might actually be LDS or LES instructions which are still legal in that mode. A valid VEX prefix would look like an LDS/LES with an otherwise invalid modrm encoding, so use that as a signal to abort processing the VEX and turn the instruction into an LES/LDS as appropriate. Change-Id: Icb367eaaa35590692df1c98862f315da4c139f5c Reviewed-on: https://gem5-review.googlesource.com/3501 Reviewed-by: Joe Gross <joe.gross@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> diff 10924:d02e9c239892 Fri Jul 17 12:31:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> x86: decode instructions with vex prefix This patch updates the x86 decoder so that it can decode instructions with vex prefix. It also updates the isa with opcodes from vex opcode maps 1, 2 and 3. Note that none of the instructions have been implemented yet. The implementations would be provided in due course of time. |
| /gem5/src/arch/x86/isa/decoder/ | ||
| H A D | decoder.isa | diff 12045:31d9a81ba286 Wed May 24 06:09:00 EDT 2017 Gabe Black <gabeblack@google.com> x86: Rework how VEX prefixes are decoded. Remove redundant information from the ExtMachInst, hash the vex information to ensure the decode cache works properly, print the vex info when printing an ExtMachInst, consider the vex info when comparing two ExtMachInsts, fold the info from the vex prefixes into existing settings, remove redundant decode code, handle vex prefixes one byte at a time and don't bother building up the entire prefix, and let instructions that care about vex use it in their implementation, instead of developing an entire parallel decode tree. This also eliminates the error prone vex immediate decode table which was incomplete and would result in an out of bounds access for incorrectly encoded instructions or when the CPU was mispeculating, as it was (as far as I can tell) redundant with the tables that already existed for two and three byte opcodes. There were differences, but I think those may have been mistakes based on the documentation I found. Also, in 32 bit mode, the VEX prefixes might actually be LDS or LES instructions which are still legal in that mode. A valid VEX prefix would look like an LDS/LES with an otherwise invalid modrm encoding, so use that as a signal to abort processing the VEX and turn the instruction into an LES/LDS as appropriate. Change-Id: Icb367eaaa35590692df1c98862f315da4c139f5c Reviewed-on: https://gem5-review.googlesource.com/3501 Reviewed-by: Joe Gross <joe.gross@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> diff 10924:d02e9c239892 Fri Jul 17 12:31:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> x86: decode instructions with vex prefix This patch updates the x86 decoder so that it can decode instructions with vex prefix. It also updates the isa with opcodes from vex opcode maps 1, 2 and 3. Note that none of the instructions have been implemented yet. The implementations would be provided in due course of time. |
| /gem5/util/m5/ | ||
| H A D | m5op_arm.S | diff 9949:7890c22dad25 Thu Oct 31 14:41:00 EDT 2013 Ali Saidi <Ali.Saidi@ARM.com> arm: fix m5ops binary for ARM and add m5fail. Changes to make m5ops work under virtualization seemed to break them working with non-virtualized systems and the recently added m5 fail command makes the m5op binary not compile. For now remove the code for virtualization. diff 8734:79592b2b1d55 Tue Jan 31 10:46:00 EST 2012 Dam Sunwoo <dam.sunwoo@arm.com> util: implements "writefile" gem5 op to export file from guest to host filesystem Usage: m5 writefile <filename> File will be created in the gem5 output folder with the identical filename. Implementation is largely based on the existing "readfile" functionality. Currently does not support exporting of folders. |
| /gem5/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/ | ||
| H A D | stats.txt | diff 11502:e273e86a873d Tue May 31 06:07:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update for snoop filter tweak diff 10628:c9b7e0c69f88 Tue Dec 23 09:31:00 EST 2014 Andreas Hansson <andreas.hansson@arm.com> stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller. |
| /gem5/src/kern/linux/ | ||
| H A D | printk.hh | diff 2665:a124942bacb8 Wed May 31 19:26:00 EDT 2006 Ali Saidi <saidi@eecs.umich.edu> Updated Authors from bk prs info |
| /gem5/src/sim/ | ||
| H A D | async.hh | diff 2665:a124942bacb8 Wed May 31 19:26:00 EDT 2006 Ali Saidi <saidi@eecs.umich.edu> Updated Authors from bk prs info |
| /gem5/src/arch/alpha/ | ||
| H A D | ev5.hh | diff 2665:a124942bacb8 Wed May 31 19:26:00 EDT 2006 Ali Saidi <saidi@eecs.umich.edu> Updated Authors from bk prs info |
| /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/ | ||
| H A D | bit_test.py | diff 7690:ae58aacfab8f Wed Sep 29 14:31:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> X86: Fix the RIP relative versions of the BT, BTC, BTR, and BTS instructions. |
| /gem5/src/base/stats/ | ||
| H A D | types.hh | diff 2665:a124942bacb8 Wed May 31 19:26:00 EDT 2006 Ali Saidi <saidi@eecs.umich.edu> Updated Authors from bk prs info |
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