linux/simple-atomic/stats.txt

---------- Begin Simulation Statistics ----------
sim_seconds                                  0.048960
sim_ticks                                 48960022500
final_tick                                48960022500
sim_freq                                 1000000000000
host_inst_rate                                 739512
host_op_rate                                   945733
host_tick_rate                              510575162
host_mem_usage                                 279300
host_seconds                                    95.89
sim_insts                                    70913204
sim_ops                                      90688159
system.voltage_domain.voltage                       1
system.clk_domain.clock                          1000
system.physmem.pwrStateResidencyTicks::UNDEFINED  48960022500
system.physmem.bytes_read::cpu.inst         312580364
system.physmem.bytes_read::cpu.data         106573345
system.physmem.bytes_read::total            419153709
system.physmem.bytes_inst_read::cpu.inst    312580364
system.physmem.bytes_inst_read::total       312580364
system.physmem.bytes_written::cpu.data       78660211
system.physmem.bytes_written::total          78660211
system.physmem.num_reads::cpu.inst           78145091
system.physmem.num_reads::cpu.data           22919730
system.physmem.num_reads::total             101064821
system.physmem.num_writes::cpu.data          19865820
system.physmem.num_writes::total             19865820
system.physmem.bw_read::cpu.inst           6384399925
system.physmem.bw_read::cpu.data           2176742157
system.physmem.bw_read::total              8561142083
system.physmem.bw_inst_read::cpu.inst      6384399925
system.physmem.bw_inst_read::total         6384399925
system.physmem.bw_write::cpu.data          1606621218
system.physmem.bw_write::total             1606621218
system.physmem.bw_total::cpu.inst          6384399925
system.physmem.bw_total::cpu.data          3783363376
system.physmem.bw_total::total            10167763301
system.pwrStateResidencyTicks::UNDEFINED  48960022500
system.cpu_clk_domain.clock                       500
system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED  48960022500
system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0
system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0
system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0
system.cpu.dstage2_mmu.stage2_tlb.read_hits            0
system.cpu.dstage2_mmu.stage2_tlb.read_misses            0
system.cpu.dstage2_mmu.stage2_tlb.write_hits            0
system.cpu.dstage2_mmu.stage2_tlb.write_misses            0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0
system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0
system.cpu.dstage2_mmu.stage2_tlb.align_faults            0
system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0
system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0
system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0
system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0
system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0
system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0
system.cpu.dstage2_mmu.stage2_tlb.hits              0
system.cpu.dstage2_mmu.stage2_tlb.misses            0
system.cpu.dstage2_mmu.stage2_tlb.accesses            0
system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED  48960022500
system.cpu.dtb.walker.walks                         0
system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0
system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0
system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0
system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0
system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0
system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0
system.cpu.dtb.walker.walkRequestOrigin::total            0
system.cpu.dtb.inst_hits                            0
system.cpu.dtb.inst_misses                          0
system.cpu.dtb.read_hits                            0
system.cpu.dtb.read_misses                          0
system.cpu.dtb.write_hits                           0
system.cpu.dtb.write_misses                         0
system.cpu.dtb.flush_tlb                            0
system.cpu.dtb.flush_tlb_mva                        0
system.cpu.dtb.flush_tlb_mva_asid                   0
system.cpu.dtb.flush_tlb_asid                       0
system.cpu.dtb.flush_entries                        0
system.cpu.dtb.align_faults                         0
system.cpu.dtb.prefetch_faults                      0
system.cpu.dtb.domain_faults                        0
system.cpu.dtb.perms_faults                         0
system.cpu.dtb.read_accesses                        0
system.cpu.dtb.write_accesses                       0
system.cpu.dtb.inst_accesses                        0
system.cpu.dtb.hits                                 0
system.cpu.dtb.misses                               0
system.cpu.dtb.accesses                             0
system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED  48960022500
system.cpu.istage2_mmu.stage2_tlb.walker.walks            0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0
system.cpu.istage2_mmu.stage2_tlb.inst_hits            0
system.cpu.istage2_mmu.stage2_tlb.inst_misses            0
system.cpu.istage2_mmu.stage2_tlb.read_hits            0
system.cpu.istage2_mmu.stage2_tlb.read_misses            0
system.cpu.istage2_mmu.stage2_tlb.write_hits            0
system.cpu.istage2_mmu.stage2_tlb.write_misses            0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0
system.cpu.istage2_mmu.stage2_tlb.flush_entries            0
system.cpu.istage2_mmu.stage2_tlb.align_faults            0
system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0
system.cpu.istage2_mmu.stage2_tlb.domain_faults            0
system.cpu.istage2_mmu.stage2_tlb.perms_faults            0
system.cpu.istage2_mmu.stage2_tlb.read_accesses            0
system.cpu.istage2_mmu.stage2_tlb.write_accesses            0
system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0
system.cpu.istage2_mmu.stage2_tlb.hits              0
system.cpu.istage2_mmu.stage2_tlb.misses            0
system.cpu.istage2_mmu.stage2_tlb.accesses            0
system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED  48960022500
system.cpu.itb.walker.walks                         0
system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0
system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0
system.cpu.itb.walker.walkRequestOrigin_Requested::total            0
system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0
system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0
system.cpu.itb.walker.walkRequestOrigin_Completed::total            0
system.cpu.itb.walker.walkRequestOrigin::total            0
system.cpu.itb.inst_hits                            0
system.cpu.itb.inst_misses                          0
system.cpu.itb.read_hits                            0
system.cpu.itb.read_misses                          0
system.cpu.itb.write_hits                           0
system.cpu.itb.write_misses                         0
system.cpu.itb.flush_tlb                            0
system.cpu.itb.flush_tlb_mva                        0
system.cpu.itb.flush_tlb_mva_asid                   0
system.cpu.itb.flush_tlb_asid                       0
system.cpu.itb.flush_entries                        0
system.cpu.itb.align_faults                         0
system.cpu.itb.prefetch_faults                      0
system.cpu.itb.domain_faults                        0
system.cpu.itb.perms_faults                         0
system.cpu.itb.read_accesses                        0
system.cpu.itb.write_accesses                       0
system.cpu.itb.inst_accesses                        0
system.cpu.itb.hits                                 0
system.cpu.itb.misses                               0
system.cpu.itb.accesses                             0
system.cpu.workload.numSyscalls                  1946
system.cpu.pwrStateResidencyTicks::ON     48960022500
system.cpu.numCycles                         97920046
system.cpu.numWorkItemsStarted                      0
system.cpu.numWorkItemsCompleted                    0
system.cpu.committedInsts                    70913204
system.cpu.committedOps                      90688159
system.cpu.num_int_alu_accesses              81528528
system.cpu.num_fp_alu_accesses                     56
system.cpu.num_func_calls                     3311620
system.cpu.num_conditional_control_insts      9253630
system.cpu.num_int_insts                     81528528
system.cpu.num_fp_insts                            56
system.cpu.num_int_register_reads           141479271
system.cpu.num_int_register_writes           53916335
system.cpu.num_fp_register_reads                   36
system.cpu.num_fp_register_writes                  20
system.cpu.num_cc_register_reads            266608097
system.cpu.num_cc_register_writes            36877111
system.cpu.num_mem_refs                      43422001
system.cpu.num_load_insts                    22866262
system.cpu.num_store_insts                   20555739
system.cpu.num_idle_cycles                          0
system.cpu.num_busy_cycles                   97920046
system.cpu.not_idle_fraction                        1
system.cpu.idle_fraction                            0
system.cpu.Branches                          13741468
system.cpu.op_class::No_OpClass                     0      0.00%      0.00%
system.cpu.op_class::IntAlu                  47187979     52.03%     52.03%
system.cpu.op_class::IntMult                    80119      0.09%     52.12%
system.cpu.op_class::IntDiv                         0      0.00%     52.12%
system.cpu.op_class::FloatAdd                       0      0.00%     52.12%
system.cpu.op_class::FloatCmp                       0      0.00%     52.12%
system.cpu.op_class::FloatCvt                       0      0.00%     52.12%
system.cpu.op_class::FloatMult                      0      0.00%     52.12%
system.cpu.op_class::FloatMultAcc                   0      0.00%     52.12%
system.cpu.op_class::FloatDiv                       0      0.00%     52.12%
system.cpu.op_class::FloatMisc                      0      0.00%     52.12%
system.cpu.op_class::FloatSqrt                      0      0.00%     52.12%
system.cpu.op_class::SimdAdd                        0      0.00%     52.12%
system.cpu.op_class::SimdAddAcc                     0      0.00%     52.12%
system.cpu.op_class::SimdAlu                        0      0.00%     52.12%
system.cpu.op_class::SimdCmp                        0      0.00%     52.12%
system.cpu.op_class::SimdCvt                        0      0.00%     52.12%
system.cpu.op_class::SimdMisc                       0      0.00%     52.12%
system.cpu.op_class::SimdMult                       0      0.00%     52.12%
system.cpu.op_class::SimdMultAcc                    0      0.00%     52.12%
system.cpu.op_class::SimdShift                      0      0.00%     52.12%
system.cpu.op_class::SimdShiftAcc                   0      0.00%     52.12%
system.cpu.op_class::SimdSqrt                       0      0.00%     52.12%
system.cpu.op_class::SimdFloatAdd                   0      0.00%     52.12%
system.cpu.op_class::SimdFloatAlu                   0      0.00%     52.12%
system.cpu.op_class::SimdFloatCmp                   0      0.00%     52.12%
system.cpu.op_class::SimdFloatCvt                   0      0.00%     52.12%
system.cpu.op_class::SimdFloatDiv                   0      0.00%     52.12%
system.cpu.op_class::SimdFloatMisc                  7      0.00%     52.12%
system.cpu.op_class::SimdFloatMult                  0      0.00%     52.12%
system.cpu.op_class::SimdFloatMultAcc               0      0.00%     52.12%
system.cpu.op_class::SimdFloatSqrt                  0      0.00%     52.12%
system.cpu.op_class::MemRead                 22866242     25.21%     77.33%
system.cpu.op_class::MemWrite                20555707     22.67%    100.00%
system.cpu.op_class::FloatMemRead                  20      0.00%    100.00%
system.cpu.op_class::FloatMemWrite                 32      0.00%    100.00%
system.cpu.op_class::IprAccess                      0      0.00%    100.00%
system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
system.cpu.op_class::total                   90690106
system.membus.snoop_filter.tot_requests             0
system.membus.snoop_filter.hit_single_requests            0
system.membus.snoop_filter.hit_multi_requests            0
system.membus.snoop_filter.tot_snoops               0
system.membus.snoop_filter.hit_single_snoops            0
system.membus.snoop_filter.hit_multi_snoops            0
system.membus.pwrStateResidencyTicks::UNDEFINED  48960022500
system.membus.trans_dist::ReadReq           100925158
system.membus.trans_dist::ReadResp          100941077
system.membus.trans_dist::WriteReq           19849901
system.membus.trans_dist::WriteResp          19849901
system.membus.trans_dist::SoftPFReq            123744
system.membus.trans_dist::SoftPFResp           123744
system.membus.trans_dist::LoadLockedReq         15919
system.membus.trans_dist::StoreCondReq          15919
system.membus.trans_dist::StoreCondResp         15919
system.membus.pkt_count_system.cpu.icache_port::system.physmem.port    156290182
system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port     85571100
system.membus.pkt_count::total              241861282
system.membus.pkt_size_system.cpu.icache_port::system.physmem.port    312580364
system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port    185233556
system.membus.pkt_size::total               497813920
system.membus.snoops                                0
system.membus.snoopTraffic                          0
system.membus.snoop_fanout::samples         120930641
system.membus.snoop_fanout::mean                    0
system.membus.snoop_fanout::stdev                   0
system.membus.snoop_fanout::underflows              0      0.00%      0.00%
system.membus.snoop_fanout::0               120930641    100.00%    100.00%
system.membus.snoop_fanout::1                       0      0.00%    100.00%
system.membus.snoop_fanout::overflows               0      0.00%    100.00%
system.membus.snoop_fanout::min_value               0
system.membus.snoop_fanout::max_value               0
system.membus.snoop_fanout::total           120930641

---------- End Simulation Statistics   ----------