| /gem5/ext/googletest/googletest/samples/ |
| H A D | sample8_unittest.cc | 62 virtual bool IsPrime(int n) const { argument
69 virtual int GetNextPrime(int p) const { argument
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| /gem5/src/arch/riscv/ |
| H A D | isa.hh | 82 RegId flattenRegId(const RegId ®Id) const { return regId; } argument
83 int flattenIntIndex(int reg) const { return reg; } argument
84 int flattenFloatIndex(int reg) const { return reg; } argument
85 int flattenVecIndex(int reg) const { return reg; } argument
86 int flattenVecElemIndex(int reg) const { return reg; } argument
87 int flattenVecPredIndex(int reg) const { return reg; } argument
88 int flattenCCIndex(int reg) const { retur argument
89 flattenMiscIndex(int reg) const argument
[all...] |
| /gem5/src/dev/arm/ |
| H A D | base_gic.hh | 105 getSystem() const argument
192 uint32_t num() const { return intNum; } argument
[all...] |
| /gem5/src/mem/cache/prefetch/ |
| H A D | associative_set_impl.hh | 56 AssociativeSet<Entry>::findEntry(Addr addr, bool is_secure) const argument
96 AssociativeSet<Entry>::getPossibleEntries(const Addr addr) const argument
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| /gem5/src/sim/ |
| H A D | sim_events.cc | 73 GlobalSimLoopExitEvent::description() const argument
125 LocalSimLoopExitEvent::description() const argument
131 LocalSimLoopExitEvent::serialize(CheckpointOut &cp) const argument
174 description() const argument
[all...] |
| H A D | syscall_desc.hh | 110 bool warnOnce() const { return (_flags & WarnOnce); } argument
114 int getFlags() const { return _flags; } argument
|
| H A D | vptr.hh | 77 operator!() const argument
|
| H A D | faults.hh | 63 FaultName name() const { return "Unimplemented simulator feature"; } argument
71 virtual FaultName name() const { return "Re-execution fault"; } argument
87 virtual FaultName name() const { return "System call retry fault"; } argument
98 FaultName name() const { retur argument
102 getFaultVAddr() const argument
110 name() const argument
114 getFaultVAddr() const argument
[all...] |
| H A D | port.hh | 106 const std::string name() const { return portName; } argument
109 PortID getId() const { return id; } argument
128 bool isConnected() const { return _connected; } argument
|
| /gem5/src/systemc/ext/tlm_utils/ |
| H A D | tlm_quantumkeeper.h | 76 need_sync() const argument
117 get_current_time() const argument
126 get_local_time() const argument
|
| /gem5/src/arch/arm/insts/ |
| H A D | misc.cc | 46 MrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
76 MsrBase::printMsrBase(std::ostream &os) const argument
129 MsrImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
138 MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
148 MrrcOp::generateDisassembly(Addr pc, const SymbolTabl argument
161 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
174 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
183 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
193 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
204 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
218 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
233 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
246 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
258 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
269 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
280 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
290 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
302 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
313 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
325 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
340 execute(ExecContext *xc, Trace::InstRecord *traceData) const argument
353 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
365 execute(ExecContext *xc, Trace::InstRecord *traceData) const argument
379 generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
[all...] |
| /gem5/src/base/ |
| H A D | fiber.hh | 83 bool finished() const { return _finished; }; argument
87 bool started() const { return _started; }; argument
|
| /gem5/src/cpu/testers/directedtest/ |
| H A D | RubyDirectedTester.hh | 82 void printStats(std::ostream& out) const {} argument
84 void printConfig(std::ostream& out) const {} argument
|
| /gem5/src/dev/alpha/ |
| H A D | tsunami_pchip.cc | 241 TsunamiPChip::getAddrRanges() const argument
253 TsunamiPChip::dmaAddr(const PciBusAddr &dev, Addr busAddr) const argument
313 TsunamiPChip::serialize(CheckpointOut &cp) const argument
|
| /gem5/src/mem/cache/ |
| H A D | queue_entry.hh | 127 bool isUncacheable() const { return _isUncacheable; } argument
[all...] |
| /gem5/src/mem/ |
| H A D | dramsim2.cc | 134 DRAMSim2::nbrOutstanding() const argument
363 DRAMSim2::MemoryPort::getAddrRanges() const argument
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| /gem5/src/systemc/tlm_bridge/ |
| H A D | sc_peq.hh | 68 const std::string name() const { return eventName; } argument
|
| /gem5/src/cpu/ |
| H A D | base.cc | 123 CPUProgressEvent::description() const argument
[all...] |
| /gem5/src/mem/ruby/network/simple/ |
| H A D | Switch.hh | 75 const Stats::Formula & getMsgCount(unsigned int type) const argument
[all...] |
| /gem5/src/mem/ruby/common/ |
| H A D | MachineID.hh | 48 MachineType getType() const { return type; } argument
49 NodeID getNum() const { return num; } argument
|
| /gem5/src/arch/generic/ |
| H A D | tlb.hh | 86 virtual bool squashed() const { return false; } argument
[all...] |
| /gem5/src/cpu/testers/rubytest/ |
| H A D | Check.hh | 53 Addr getAddress() const { return m_address; } argument
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| /gem5/src/mem/ruby/slicc_interface/ |
| H A D | AbstractCacheEntry.hh | 72 uint32_t getSetIndex() const { return m_set_index; } argument
75 uint32_t getWayIndex() const { return m_way_index; } argument
|
| /gem5/src/dev/ |
| H A D | io_device.hh | 139 params() const argument
170 params() const argument
[all...] |
| /gem5/src/arch/arm/ |
| H A D | remote_gdb.cc | 225 RemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext *context) const argument
284 RemoteGDB::AArch32GdbRegCache::setRegs(ThreadContext *context) const argument
|