Searched refs:regFile (Results 1 - 6 of 6) sorted by relevance
/gem5/src/cpu/o3/ |
H A D | free_list.cc | 41 : _name(_my_name), regFile(_regFile) 47 regFile->initFreeList(this);
|
H A D | rename_map.cc | 118 regFile = _regFile; 145 regFile->numVecPhysRegs() - TheISA::NumVecRegs, 151 auto range = this->regFile->getRegElemIds(vr); 161 regFile->numVecElemPhysRegs() - 165 auto range = regFile->getRegIds(VecRegClass); 185 PhysRegFile::IdRange range = this->regFile->getRegElemIds(vec); 211 dst[l] = regFile->readVecElem(s_prid); 217 regFile->setVecReg(regFile->getTrueId(&pregId), new_RF[i]);
|
H A D | cpu.cc | 115 regFile(params->numPhysIntRegs, 122 freeList(name() + ".freelist", ®File), 127 regFile.totalNumPhysRegs()), 233 commitRenameMap[tid].init(®File, TheISA::ZeroReg, fpZeroReg, 237 renameMap[tid].init(®File, TheISA::ZeroReg, fpZeroReg, 1202 return regFile.readIntReg(phys_reg); 1210 return regFile.readFloatReg(phys_reg); 1219 return regFile.readVecReg(phys_reg); 1228 return regFile.getWritableVecReg(phys_reg); 1236 return regFile [all...] |
H A D | rename_map.hh | 202 PhysRegFile *regFile; member in class:UnifiedRenameMap 209 UnifiedRenameMap() : regFile(nullptr) {}; 294 return regFile->getMiscRegId(arch_reg.flatIndex());
|
H A D | cpu.hh | 381 return regFile.readVecLane<VecElem, LaneIdx>(phys_reg); 392 return regFile.readVecLane<VecElem>(phys_reg); 401 return regFile.setVecLane(phys_reg, val); 578 PhysRegFile regFile; member in class:FullO3CPU
|
H A D | free_list.hh | 150 PhysRegFile *regFile; member in class:UnifiedFreeList
|
Completed in 12 milliseconds