Searched refs:MISCREG_SEV_MAILBOX (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Dlocked_mem.hh87 xc->setMiscReg(MISCREG_SEV_MAILBOX, true);
109 xc->setMiscReg(MISCREG_SEV_MAILBOX, true);
162 xc->setMiscReg(MISCREG_SEV_MAILBOX, true);
H A Dmiscregs.hh89 MISCREG_SEV_MAILBOX, enumerator in enum:ArmISA::MiscRegIndex
H A Dfaults.cc558 tc->setMiscReg(MISCREG_SEV_MAILBOX, 1);
1611 tc->setMiscReg(MISCREG_SEV_MAILBOX, 1);
H A Disa.cc144 miscRegs[MISCREG_SEV_MAILBOX] = 1;
H A Dmiscregs.cc2961 InitReg(MISCREG_SEV_MAILBOX)

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