Searched refs:inSecureState (Results 1 - 16 of 16) sorted by relevance
| /gem5/src/dev/arm/ |
| H A D | gic_v3_cpu_interface.cc | 124 if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
147 if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
170 if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
187 if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
219 if ((currEL() == EL1) && !inSecureState() &&
226 if (haveEL(EL3) && !inSecureState() &&
255 if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
285 if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
315 if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
358 if ((currEL() == EL1) && !inSecureState()
2325 Gicv3CPUInterface::inSecureState() const function in class:Gicv3CPUInterface
[all...] |
| H A D | gic_v3_cpu_interface.hh | 318 bool inSecureState() const;
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| /gem5/src/arch/arm/ |
| H A D | interrupts.hh | 146 bool isSecure = inSecureState(tc);
186 virtWake &= (cpsr.mode != MODE_HYP) && !inSecureState(scr, cpsr);
196 useHcrMux = (cpsr.mode != MODE_HYP) && !inSecureState(scr, cpsr);
236 bool isSecure = inSecureState(tc);
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| H A D | interrupts.cc | 69 bool is_secure = inSecureState(tc);
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| H A D | utility.hh | 237 inSecureState(SCR scr, CPSR cpsr) function in namespace:ArmISA
253 bool inSecureState(ThreadContext *tc);
257 * Differs from inSecureState in that it ignores the current EL
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| H A D | utility.cc | 196 inSecureState(ThreadContext *tc) function in namespace:ArmISA
200 return ArmSystem::haveSecurity(tc) && inSecureState(
479 if (!inSecureState(scr, cpsr) && (cpsr.mode != MODE_HYP)) {
613 if (!inSecureState(scr, cpsr) && (cpsr.mode != MODE_HYP)) {
663 if (!inSecureState(scr, cpsr) && (cpsr.mode != MODE_HYP)) {
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| H A D | faults.cc | 805 toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (cpsr.mode == MODE_USER);
877 toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (cpsr.mode == MODE_USER);
963 if (!inSecureState(tc) && ArmSystem::haveEL(tc, EL2))
1017 toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (currEL(tc) == EL0);
1295 ) && !inSecureState(tc);
1361 ) && !inSecureState(tc);
1451 toHyp = (!scr.irq && hcr.imo && !inSecureState(tc)) ||
1490 toHyp = (!scr.fiq && hcr.fmo && !inSecureState(tc)) ||
1539 toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (currEL(tc) == EL0);
1574 toHyp = (!scr.ea && hcr.amo && !inSecureState(t
[all...] |
| H A D | isa.hh | 646 inSecureState(miscRegs[MISCREG_SCR],
651 !inSecureState(miscRegs[MISCREG_SCR],
679 inSecureState(miscRegs[MISCREG_SCR],
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| H A D | isa.cc | 524 if ((cpsr.mode == MODE_HYP) || inSecureState(scr, cpsr)) {
694 inSecureState(readMiscRegNoEffect(MISCREG_SCR),
1635 inSecureState(readMiscRegNoEffect(MISCREG_SCR),
2143 } else if (haveVirtualization && !inSecureState(tc) &&
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| H A D | pmu.cc | 503 const bool secure(inSecureState(scr, cpsr));
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| H A D | semihosting.cc | 255 if (ArmISA::inSecureState(tc)) {
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| H A D | tlb.cc | 1307 isSecure = inSecureState(tc) &&
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| /gem5/src/arch/arm/insts/ |
| H A D | static_inst.cc | 635 if ((ArmSystem::haveEL(tc, EL2) && !inSecureState(tc) &&
670 if (ArmSystem::haveVirtualization(tc) && !inSecureState(tc)) {
705 const bool is_secure = inSecureState(tc);
886 ArmSystem::haveEL(tc, EL2) && !inSecureState(scr, cpsr) &&
922 MISCREG_SCTLR, tc, !inSecureState(tc));
1162 (ArmSystem::haveEL(tc, EL2) && !inSecureState(tc) &&
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| H A D | misc64.cc | 154 if (!inSecureState(scr, cpsr) && (el != EL2)) {
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| H A D | static_inst.hh | 209 bool isSecure = inSecureState(scr, cpsr) || !haveSecurity;
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| /gem5/src/arch/arm/tracers/ |
| H A D | tarmac_record.cc | 123 secureMode = inSecureState(tarmCtx.thread);
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