Searched refs:freq (Results 1 - 13 of 13) sorted by relevance

/gem5/src/arch/alpha/
H A Dsystem.hh127 void setIntrFreq(Tick freq) { intrFreq = freq; } argument
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/
H A Dtestbench.cpp96 gen_sine(float t, float freq) // freq in Hertz argument
98 return sin(6.283185 * freq * t * CLOCK_PERIOD * 1e-9);
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/
H A Dtestbench.cpp94 gen_sine(float t, float freq) // freq in Hertz argument
96 return sin(6.283185 * freq * t * CLOCK_PERIOD * 1e-9);
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/
H A Dtestbench.cpp96 gen_sine(float t, float freq) // freq in Hertz argument
98 return sin(6.283185 * freq * t * CLOCK_PERIOD * 1e-9);
/gem5/src/dev/arm/
H A Drv_ctrl.cc244 if (SimClock::Float::s / p->freq > UINT32_MAX) {
246 SimClock::Float::s / p->freq / 1E6);
249 _clockPeriod = p->freq;
291 const uint32_t freq(SimClock::Float::s / _clockPeriod);
292 DPRINTF(RVCTRL, "Reading OSC frequency: %f MHz\n", freq / 1E6);
293 return freq;
297 RealViewOsc::write(uint32_t freq) argument
299 DPRINTF(RVCTRL, "Setting new OSC frequency: %f MHz\n", freq / 1E6);
300 clockPeriod(SimClock::Float::s / freq);
H A DRealView.py247 freq = Param.Clock("Default frequency") variable in class:RealViewOsc
256 freq = int(1.0/self.freq.value) # Values are stored as a clock period
257 node.append(FdtPropertyWords("freq-range", [freq, freq]))
293 osc_mcc = Osc(device=0, freq="50MHz")
294 osc_clcd = Osc(device=1, freq="23.75MHz")
295 osc_peripheral = Osc(device=2, freq="24MHz")
296 osc_system_bus = Osc(device=4, freq
[all...]
H A Dgeneric_timer.cc57 SystemCounter::setFreq(uint32_t freq) argument
63 _freq = freq;
64 _period = (1.0 / freq) * SimClock::Frequency;
428 return systemCounter.freq();
626 return systemCounter.freq();
721 return systemCounter.freq();
H A Dgeneric_timer.hh89 uint64_t freq() const { return _freq; } function in class:SystemCounter
91 /// @param freq frequency in Hz.
92 void setFreq(uint32_t freq);
H A Drv_ctrl.hh217 void write(uint32_t freq) override;
/gem5/tests/configs/
H A Dswitcheroo.py76 def run_test(root, switcher=None, freq=1000, verbose=False):
118 period = m5.ticks.fromSeconds(1.0 / freq)
/gem5/src/cpu/kvm/
H A Dperfevent.hh88 attr.freq = 0;
/gem5/ext/dsent/
H A DDSENT.cc36 double freq = params.at("Frequency").toDouble(); local
68 timing_optimizer.getNet(net_name, makeNetIndex(0)), 1.0 / freq);
90 electrical_model->getNet(net_name), 1.0 / freq);
/gem5/src/cpu/
H A DBaseCPU.py328 freq = int(self.clk_domain.unproxy(self).clock[0].frequency)
329 node.append(FdtPropertyWords("clock-frequency", freq))

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