Searched refs:curTick (Results 1 - 25 of 213) sorted by relevance

123456789

/gem5/src/sim/
H A Dsim_exit.hh39 Tick curTick();
49 /// Python) at the end of the current cycle (curTick()). The message
53 Tick when = curTick(), Tick repeat = 0,
H A Dstat_control.hh62 * checkpoint, curTick will be updated, and any already scheduled events can
77 void schedStatEvent(bool dump, bool reset, Tick when = curTick(),
H A Dsimulate.cc107 inform("Entering event queue @ %d. Starting simulation...\n", curTick());
109 if (num_cycles < MaxTick - curTick())
110 num_cycles = curTick() + num_cycles;
122 quantum_event = new GlobalSyncEvent(curTick() + simQuantum, simQuantum,
190 assert(curTick() <= eventq->nextTick() &&
H A Ddebug.cc96 schedBreak(curTick() + delta);
114 when = curTick() + 1;
H A Dstat_control.cc81 startTick = curTick();
98 return curTick() - startTick;
104 return curTick();
240 Stats::schedStatEvent(dump, reset, curTick() + repeat, repeat);
275 * by curTick. This ensures that we do not schedule the event is the past.
279 if (period >= curTick()) {
282 schedStatEvent(true, true, (Tick)period + curTick(), (Tick)period);
293 * shift the event by curTick.
296 (dumpEvent->scheduled() && dumpEvent->when() < curTick())) {
297 // shift by curTick() an
[all...]
H A Dclocked_object.hh69 // the tick value of the next clock edge (>= curTick()) at the
79 * complete, tick must be at least curTick().
86 // has already passed curTick()
87 if (tick >= curTick())
96 if (tick >= curTick())
102 Cycles elapsedCycles(divCeil(curTick() - tick, clockPeriod()));
142 Cycles elapsedCycles(divCeil(curTick(), clockPeriod()));
168 * curTick() is on a clock edge, the number of cycles in the parameter is
169 * added to curTick() to be returned. When curTick() i
[all...]
H A Dclocked_object.cc93 if (prvEvalTick == curTick() && curTick() != 0) {
113 Tick elapsed_time = curTick() - prvEvalTick;
124 prvEvalTick = curTick();
136 Tick elapsed_time = curTick() - prvEvalTick;
H A Dsim_events.cc67 : GlobalEvent(curTick(), Minimum_Pri, IsExitEvent),
85 schedule(curTick() + repeat);
93 warn_if(serialize && (when != curTick() || repeat),
H A Dcore.hh47 inline Tick curTick() { return _curEventQueue->getCurTick(); } function
/gem5/src/mem/ruby/structures/
H A DBankedArray.cc61 if (busyBanks[bank].endAccess >= curTick()) {
77 if (busyBanks[bank].endAccess >= curTick()) {
78 if (busyBanks[bank].startAccess == curTick() &&
89 busyBanks[bank].startAccess = curTick();
90 busyBanks[bank].endAccess = curTick() +
59 assert(bank < banks); if (busyBanks[bank].endAccess >= curTick()) argument
75 assert(bank < banks); if (busyBanks[bank].endAccess >= curTick()) argument
/gem5/util/systemc/systemc_within_gem5/systemc_simple_object/
H A Dfeeder.cc51 schedule(&event, curTick() + delay);
62 schedule(&event, curTick() + delay);
/gem5/configs/learning_gem5/part2/
H A Dhello_goodbye.py59 print('Exiting @ tick %i because %s' % (m5.curTick(), exit_event.getCause()))
H A Drun_simple.py57 print('Exiting @ tick %i because %s' % (m5.curTick(), exit_event.getCause()))
/gem5/src/python/m5/
H A D__init__.py41 _m5.core.curTick
H A Devent.py78 self.eventq.schedule(self, m5.curTick() + self.period)
81 print("Progress! Time now %fs" % (m5.curTick()/1e12))
82 self.eventq.schedule(self, m5.curTick() + self.period)
/gem5/src/mem/cache/replacement_policies/
H A Dbip_rp.cc51 casted_replacement_data->lastTouchTick = curTick();
/gem5/src/unittest/
H A Dstattest.cc423 curEventQueue()->setCurTick(curTick() + ULL(1000000));
498 curEventQueue()->setCurTick(curTick() + ULL(1000000));
500 curEventQueue()->setCurTick(curTick() + ULL(1000000));
502 curEventQueue()->setCurTick(curTick() + ULL(1000000));
504 curEventQueue()->setCurTick(curTick() + ULL(1000000));
506 curEventQueue()->setCurTick(curTick() + ULL(1000000));
513 curEventQueue()->setCurTick(curTick() + ULL(1000000));
515 curEventQueue()->setCurTick(curTick() + ULL(1000000));
517 curEventQueue()->setCurTick(curTick() + ULL(1000000));
519 curEventQueue()->setCurTick(curTick()
[all...]
/gem5/src/base/
H A Dtrace.hh172 Trace::getDebugLogger()->dump(curTick(), name(), data, count); \
178 Trace::getDebugLogger()->dprintf(curTick(), name(), \
186 Trace::getDebugLogger()->dprintf(curTick(), s->name(), \
200 Trace::getDebugLogger()->dump(curTick(), name(), data, count); \
204 Trace::getDebugLogger()->dprintf(curTick(), name(), __VA_ARGS__); \
/gem5/src/learning_gem5/part2/
H A Dhello_object.cc69 schedule(event, curTick() + latency);
H A Dgoodbye_object.cc91 schedule(event, curTick() + bandwidth * bytes_copied);
95 exitSimLoop(buffer, 0, curTick() + bandwidth * bytes_copied);
/gem5/src/mem/cache/
H A Dcache_blk.cc62 tickInserted = curTick();
/gem5/src/mem/cache/prefetch/
H A Dsbooe.cc78 if (entry.expectedArrivalTick > curTick()) {
84 sb.insert(access_line, curTick() + averageAccessLatency);
100 // (2) Calculate the elapsed cycles until it was filled (curTick)
107 Tick elapsed_ticks = curTick() - it->second;
133 demandAddresses.insert(std::pair<Addr, Tick>(pfi_addr, curTick()));
/gem5/src/mem/
H A Dtport.cc79 schedTimingResp(pkt, curTick() + latency);
/gem5/src/dev/
H A Dmc146818.cc133 schedule(event, curTick() + event.offset);
135 schedule(tickEvent, curTick() + tickEvent.offset);
184 schedule(tickEvent, curTick() + SimClock::Int::s / 2);
282 Tick rtcTimerInterruptTickOffset = event.when() - curTick();
284 Tick rtcClockTickOffset = tickEvent.when() - curTick();
321 parent->schedule(this, curTick() + interval);
328 parent->schedule(this, curTick() + interval);
342 parent->schedule(this, curTick() + SimClock::Int::s);
/gem5/src/dev/net/
H A Detherdump.cc97 pkthdr.seconds = curTick() / SimClock::Int::s;
98 pkthdr.microseconds = (curTick() / SimClock::Int::us) % ULL(1000000);

Completed in 23 milliseconds

123456789