Searched refs:advSimdInteger (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/arm/ | ||
| H A D | miscregs_types.hh | 453 Bitfield<15, 12> advSimdInteger; member in namespace:ArmISA |
| H A D | isa.cc | 164 mvfr1.advSimdInteger = 1; |
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