Searched refs:CR0 (Results 1 - 8 of 8) sorted by relevance

/gem5/src/arch/x86/
H A Disa.hh55 void updateHandyM5Reg(Efer efer, CR0 cr0,
H A Disa.cc44 ISA::updateHandyM5Reg(Efer efer, CR0 cr0,
204 CR0 toggled = regVal[miscReg] ^ val;
205 CR0 newCR0 = val;
H A Dfaults.cc194 CR0 cr0 = tc->readMiscReg(MISCREG_CR0);
195 CR0 newCR0 = 1 << 4;
H A Dprocess.cc400 CR0 cr0 = 0;
416 CR0 cr2 = 0;
617 CR0 cr0 = 0;
737 CR0 cr0 = 0;
H A Dsystem.cc263 CR0 cr0 = tc->readMiscRegNoEffect(MISCREG_CR0);
H A Dtlb.cc392 CR0 cr0 = tc->readMiscRegNoEffect(MISCREG_CR0);
/gem5/src/arch/x86/regs/
H A Dmisc.hh50 #undef CR0 macro
595 BitUnion64(CR0)
607 EndBitUnion(CR0)
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc840 CR0 cr0 = tc->readMiscRegNoEffect(MISCREG_CR0);
1134 CR0 cr0 = tc->readMiscRegNoEffect(MISCREG_CR0);

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