Searched refs:BAR0 (Results 1 - 7 of 7) sorted by relevance
| /gem5/src/dev/virtio/ | ||
| H A D | VirtIO.py | 72 BAR0 = 0x00000001 # Anywhere in 32-bit space; IOREG variable in class:PciVirtIO |
| /gem5/src/dev/storage/ | ||
| H A D | Ide.py | 55 BAR0 = 0x00000001 variable in class:IdeController |
| /gem5/src/dev/net/ | ||
| H A D | Ethernet.py | 157 BAR0 = 0x00000000 variable in class:IGbE 229 BAR0 = 0x00000001 variable in class:NSGigE 270 BAR0 = 0x00000000 variable in class:Sinic |
| /gem5/src/dev/pci/ | ||
| H A D | PciDevice.py | 74 BAR0 = Param.UInt32(0x00, "Base Address Register 0") variable in class:PciDevice 86 BAR0LegacyIO = Param.Bool(False, "Whether BAR0 is hardwired legacy IO") |
| H A D | device.cc | 102 config.baseAddr[0] = htole(p->BAR0); |
| /gem5/src/dev/x86/ | ||
| H A D | SouthBridge.py | 71 ide.BAR0 = 0x1f0 |
| /gem5/src/dev/arm/ | ||
| H A D | RealView.py | 640 BAR0 = 0x18000000, BAR0Size = '16B', 810 BAR0 = 0x1C1A0000, BAR0Size = '256B', |
Completed in 21 milliseconds