Searched refs:xc (Results 26 - 40 of 40) sorted by relevance

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/gem5/src/base/
H A Dcirclebuf.test.cc46 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf,
/gem5/src/arch/arm/insts/
H A Dmisc.cc340 McrMrcMiscInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const argument
342 bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss);
365 McrMrcImplDefined::execute(ExecContext *xc, Trace::InstRecord *traceData) const argument
367 bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss);
H A Dmisc64.cc373 MiscRegImplDefined64::execute(ExecContext *xc, argument
376 auto tc = xc->tcBase();
H A Dmisc.hh393 Fault execute(ExecContext *xc,
411 Fault execute(ExecContext *xc,
H A Dmisc64.hh227 Fault execute(ExecContext *xc,
H A Dpred_inst.hh115 case 0xc:
H A Dstatic_inst.cc630 ArmStaticInst::softwareBreakpoint32(ExecContext *xc, uint16_t imm) const
632 const auto tc = xc->tcBase();
642 return std::make_shared<PrefetchAbort>(readPC(xc),
H A Dsve.cc837 case 0xc:
873 case 0xc:
/gem5/src/arch/mips/
H A Dmt.hh104 readRegOtherThread(ExecContext *xc, const RegId &reg, argument
107 return readRegOtherThread(xc->tcBase(), reg, tid);
111 setRegOtherThread(ExecContext *xc, const RegId& reg, RegVal val, argument
114 setRegOtherThread(xc->tcBase(), reg, val, tid);
/gem5/src/cpu/
H A Dstatic_inst.hh273 virtual Fault execute(ExecContext *xc,
276 virtual Fault initiateAcc(ExecContext *xc, argument
282 virtual Fault completeAcc(Packet *pkt, ExecContext *xc, argument
/gem5/system/arm/aarch64_bootloader/
H A Dboot.S47 cmp x0, #0xc // EL3?
/gem5/src/dev/net/
H A Dsinic.cc370 Addr paddr = vtophys(req->xc, vaddr);
408 Addr paddr = vtophys(req->xc, vaddr);
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h974 #define CAUSE_FETCH_PAGE_FAULT 0xc
/gem5/src/arch/arm/
H A Disa.cc653 return miscRegs[MISCREG_CPSR] & 0xc;
H A Dtable_walker.cc1306 case 0xc:

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