Searched refs:when (Results 26 - 50 of 99) sorted by relevance

1234

/gem5/src/sim/
H A Dstat_control.cc248 schedStatEvent(bool dump, bool reset, Tick when, Tick repeat) argument
250 // simQuantum is being added to the time when the stats would be
254 dumpEvent = new StatEvent(when + simQuantum, dump, reset, repeat);
296 (dumpEvent->scheduled() && dumpEvent->when() < curTick())) {
298 Tick _when = dumpEvent->when();
H A Ddvfs_handler.cc153 Tick when = curTick() + _transLatency; local
154 DPRINTF(DVFS, "DVFS: Update for perf event scheduled for %ld\n", when);
156 schedule(update_event, when);
219 whens.push_back(event->scheduled() ? event->when() : 0);
H A Deventq.cc197 // curr points to the top item of the the correct 'in bin' list, when
225 // forward current cycle to the time when this event occurs.
226 setCurTick(event->when());
288 // should only be called when restoring from a checkpoint (which
330 if (nextInBin->when() < time) {
334 } else if (nextInBin->when() == time &&
348 time = nextInBin->when();
395 DPRINTFN("%s event %s @ %d\n", description(), action, when());
410 cprintf("Scheduled for %d, priority %d\n", when(), _priority);
H A Dpseudo_inst.cc307 Tick when = curTick() + delay * SimClock::Int::ns; local
308 exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
316 Tick when = curTick() + delay * SimClock::Int::ns; local
317 exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
442 Tick when = curTick() + delay * SimClock::Int::ns;
445 Stats::schedStatEvent(false, true, when, repeat);
456 Tick when = curTick() + delay * SimClock::Int::ns;
459 Stats::schedStatEvent(true, false, when, repeat);
470 Tick when = curTick() + delay * SimClock::Int::ns;
473 Stats::schedStatEvent(true, true, when, repea
484 Tick when = curTick() + delay * SimClock::Int::ns; local
[all...]
H A Dsim_events.hh63 GlobalSimLoopExitEvent(Tick when, const std::string &_cause, int c,
100 // occurred using a shared counter: used to terminate when *all*
/gem5/util/systemc/gem5_within_systemc/
H A Dsc_module.hh103 /** Are we in Module::simulate? Used to mask events when not inside
120 void wakeup(Tick when);
H A Dsc_logger.cc135 Logger::logMessage(Tick when, const std::string &name, argument
/gem5/src/arch/arm/tracers/
H A Dtarmac_tracer.hh100 InstRecord* getInstRecord(Tick when, ThreadContext *tc,
H A Dtarmac_parser.hh243 getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, argument
251 return new TarmacParserRecord(when, tc, staticInst, pc, *this,
265 * Tracing starts when the PC gets this value for the first time (ignored
/gem5/src/mem/
H A Dbridge.hh69 * reserved when a request arrives, also reserving response space
133 /** If we should send a retry when space becomes available. */
153 * Handle send event, scheduled when the packet at the head of
183 * @param when tick when response packet should be sent
185 void schedTimingResp(PacketPtr pkt, Tick when);
251 * Handle send event, scheduled when the packet at the head of
287 * @param when tick when response packet should be sent
289 void schedTimingReq(PacketPtr pkt, Tick when);
[all...]
H A Dserial_link.hh129 /** If we should send a retry when space becomes available. */
143 * Handle send event, scheduled when the packet at the head of
175 * @param when tick when response packet should be sent
177 void schedTimingResp(PacketPtr pkt, Tick when);
243 * Handle send event, scheduled when the packet at the head of
280 * @param when tick when response packet should be sent
282 void schedTimingReq(PacketPtr pkt, Tick when);
H A Dbridge.cc126 // all checks are done when the request is accepted on the slave
216 Bridge::BridgeMasterPort::schedTimingReq(PacketPtr pkt, Tick when) argument
223 bridge.schedule(sendEvent, when);
228 transmitList.emplace_back(pkt, when);
233 Bridge::BridgeSlavePort::schedTimingResp(PacketPtr pkt, Tick when) argument
240 bridge.schedule(sendEvent, when);
243 transmitList.emplace_back(pkt, when);
H A Dserial_link.cc134 // all checks are done when the request is accepted on the slave
242 SerialLink::SerialLinkMasterPort::schedTimingReq(PacketPtr pkt, Tick when) argument
249 serial_link.schedule(sendEvent, when);
254 transmitList.emplace_back(DeferredPacket(pkt, when));
259 SerialLink::SerialLinkSlavePort::schedTimingResp(PacketPtr pkt, Tick when) argument
266 serial_link.schedule(sendEvent, when);
269 transmitList.emplace_back(DeferredPacket(pkt, when));
H A Dpacket_queue.hh71 Tick tick; ///< The tick when the packet is ready to transmit
195 * @param when time to schedule an event
197 void schedSendEvent(Tick when);
203 * @param when Absolute time (in ticks) to send packet
205 void schedSendTiming(PacketPtr pkt, Tick when);
232 // Static definition so it can be called when constructing the parent
268 // Static definition so it can be called when constructing the parent
306 // Static definition so it can be called when constructing the parent
/gem5/src/dev/arm/
H A Dtimer_a9global.cc113 cmpValEvent.when(), parent->clockPeriod(), control.prescalar);
115 time = getTimeCounterFromTicks(cmpValEvent.when() - curTick());
124 cmpValEvent.when(), parent->clockPeriod(), control.prescalar);
126 time = getTimeCounterFromTicks(cmpValEvent.when() - curTick());
274 event_time = cmpValEvent.when();
H A Dtimer_cpulocal.cc123 timerZeroEvent.when(), parent->clockPeriod(),
125 time = timerZeroEvent.when() - curTick();
143 watchdogZeroEvent.when(), parent->clockPeriod(),
145 time = watchdogZeroEvent.when() - curTick();
225 // Can't be written when in watchdog mode, but can in timer mode
382 timer_event_time = timerZeroEvent.when();
387 watchdog_event_time = watchdogZeroEvent.when();
H A Dsmmu_v3_proc.hh54 * The meaning of these becomes apparent when you
125 void scheduleWakeup(Tick when);
H A Dsmmu_v3_proc.cc195 SMMUProcess::scheduleWakeup(Tick when) argument
200 smmu.schedule(ep, when);
H A Dtimer_sp804.cc93 zeroEvent.when(), clock, control.timerPrescale);
95 time = zeroEvent.when() - curTick();
240 event_time = zeroEvent.when();
H A Dflash_device.cc161 * The function determines when certain actions are scheduled and schedules
240 * planes, now lets find the maximum to know when to callback the disk
270 else if (planeEventQueue[count].back().time < planeEvent.when())
282 DPRINTF(FlashDevice, "first event @ %d\n", planeEvent.when());
326 /** Find when to schedule the planeEvent next */
344 DPRINTF(FlashDevice, "first event @ %d\n", planeEvent.when());
349 * approach. asumption: garbage collection happens when a clean is needed
591 if (planeEvent.when() > curTick()) {
/gem5/src/cpu/
H A Dinst_pb_trace.cc95 // get a callback when we exit so we can close the file
123 InstPBTrace::getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr si, argument
130 return new InstPBTraceRecord(*this, when, tc, si, pc, mi);
H A Dthread_state.cc76 quiesceEndTick = quiesceEvent->when();
106 // connected, i.e. when restoring from a checkpoint and later
/gem5/ext/systemc/src/tlm_utils/
H A Dpeq_with_cb_and_phase.h223 void notify (tlm_payload_type& t, const tlm_phase_type& p, const sc_core::sc_time& when){ argument
225 if (when==sc_core::SC_ZERO_TIME) {
233 m_ppq.insert(PAYLOAD(&t,p), when + sc_core::sc_time_stamp() );
234 m_e.notify(when); // note, this will only over-right the "newest" event.
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/
H A Dillegal.S60 # Make sure WFI doesn't trap when TW=0.
67 # Make sure WFI does trap when TW=1.
71 # Make sure SFENCE.VMA and sptbr don't trap when TVM=0.
79 # Make sure SFENCE.VMA and sptbr do trap when TVM=1.
86 # Make sure SRET doesn't trap when TSR=0.
98 # Make sure SRET does trap when TSR=1.
/gem5/src/systemc/ext/tlm_utils/
H A Dpeq_with_cb_and_phase.h206 const sc_core::sc_time &when)
208 if (when == sc_core::SC_ZERO_TIME) {
218 m_ppq.insert(PAYLOAD(&t, p), when + sc_core::sc_time_stamp());
220 m_e.notify(when);
205 notify(tlm_payload_type &t, const tlm_phase_type &p, const sc_core::sc_time &when) argument

Completed in 40 milliseconds

1234