Searched refs:vector (Results 226 - 250 of 763) sorted by relevance

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/gem5/src/systemc/tests/systemc/1666-2011-compliance/living_children/
H A Dliving_children.cpp59 std::vector<sc_object*> children = t1.get_child_objects();
81 std::vector<sc_object*> children = me.get_child_objects();
84 std::vector<sc_event*> my_events = me.get_child_events();
/gem5/src/gpu-compute/
H A Dvector_register_file.hh102 std::vector<uint32_t> &regVec, uint32_t operandSize,
135 std::vector<uint8_t> busy;
138 std::vector<uint8_t> nxtBusy;
143 // vector register state
H A Dshader.hh142 std::vector<uint32_t*> sa_val;
144 std::vector<uint64_t> sa_when;
146 std::vector<int32_t> sa_x;
149 std::vector<ComputeUnit*> cuList;
/gem5/src/arch/arm/tracers/
H A Dtarmac_record_v8.hh142 void addInstEntry(std::vector<InstPtr>& queue, const TarmacContext& ptr);
145 void addMemEntry(std::vector<MemPtr>& queue, const TarmacContext& ptr);
148 void addRegEntry(std::vector<RegPtr>& queue, const TarmacContext& ptr);
/gem5/src/cpu/pred/
H A Dsimple_indirect.hh78 std::vector<std::vector<IPredEntry> > targetCache;
101 std::vector<ThreadInfo> threadInfo;
/gem5/src/base/stats/
H A Dhdf5.hh48 #include <vector>
84 * Helper function to append vector stats and set their metadata.
103 * Helper function to add a string vector attribute to a stat.
110 const std::vector<const char *> &values);
113 * Helper function to add a string vector attribute to a stat.
120 const std::vector<std::string> &values);
/gem5/src/unittest/
H A Dstrnumtest.cc33 #include <vector>
/gem5/ext/dsent/model/std_cells/
H A DStdCellLib.h66 const String genDrivingStrengthString(const vector<double>& driving_strength_) const;
/gem5/ext/dsent/model/timing_graph/
H A DElectricalDriverMultiplier.cc63 vector<ElectricalTimingNode*>* downstream_nodes = ElectricalTimingNode::getDownstreamNodes();
/gem5/src/sim/probe/
H A Dprobe.hh65 #include <vector>
97 * The vector of listeners is used simply to hold onto listeners until the
104 std::vector<ProbeListener *> listeners;
158 std::vector<ProbePoint *> points;
245 * directly to ProbeListenerArgs of the same type, we can store the vector of
254 std::vector<ProbeListenerArgBase<Arg> *> listeners;
/gem5/src/sim/power/
H A Dthermal_domain.hh43 #include <vector>
/gem5/src/arch/arm/freebsd/
H A Dsystem.hh39 #include <vector>
/gem5/ext/systemc/src/sysc/communication/
H A Dsc_signal_rv.h22 sc_signal_rv.h -- The resolved vector signal class.
55 static void resolve(sc_dt::sc_lv<W>&, const std::vector<sc_dt::sc_lv<W>*>&);
67 const std::vector<sc_dt::sc_lv<W>*>& values_ )
91 // The resolved vector signal class.
150 std::vector<sc_process_b*> m_proc_vec; // processes writing this signal
151 std::vector<data_type*> m_val_vec; // new values written this signal
/gem5/ext/systemc/src/sysc/kernel/
H A Dsc_module_registry.h84 std::vector<sc_module*> m_module_vec;
H A Dsc_object.h106 virtual const std::vector<sc_event*>& get_child_events() const
109 virtual const std::vector<sc_object*>& get_child_objects() const
149 std::vector<sc_event*> m_child_events; // list of child events.
150 std::vector<sc_object*> m_child_objects; // list of child objects.
/gem5/src/cpu/kvm/
H A Dvm.hh44 #include <vector>
151 typedef std::vector<struct kvm_cpuid_entry2> CPUIDVector;
152 typedef std::vector<uint32_t> MSRIndexVector;
193 /** Cached vector of supported CPUID entries. */
196 /** Cached vector of supported MSRs. */
550 std::vector<MemorySlot> memorySlots;
/gem5/src/systemc/core/
H A Dport.hh35 #include <vector>
117 std::vector<Binding *> bindings;
118 std::vector<Sensitivity *> sensitivities;
119 std::vector<Reset *> resets;
/gem5/src/systemc/ext/channel/
H A Dsc_event_queue.hh77 sc_time, std::vector<sc_time>, std::greater<sc_time> > _times;
/gem5/src/systemc/tests/systemc/utils/sc_vector/test01/
H A Dtest01.cpp50 // vector of sub-modules
53 // vector of ports
61 // delayed initialisation of port vector
62 // here with default prefix sc_core::sc_gen_unique_name("vector")
74 std::vector<sc_object*> children = m.get_child_objects();
/gem5/src/arch/riscv/
H A Dsystem.hh39 #include <vector>
62 // return reset vector
/gem5/src/dev/ps2/
H A Dmouse.hh73 bool recv(const std::vector<uint8_t> &data) override;
/gem5/src/mem/qos/
H A Dpolicy_pf.hh112 std::vector<MasterHistory> history;
/gem5/src/base/
H A Dfiber.test.cc47 #include <vector>
78 std::vector<Fiber *> next;
94 std::vector<SwitchingFiber *>::iterator expectedIt;
95 std::vector<SwitchingFiber *> expected({
/gem5/src/cpu/minor/
H A Dfetch2.hh81 std::vector<InputBuffer<ForwardInstData>> &nextStageReserve;
95 std::vector<InputBuffer<ForwardLineData>> inputBuffer;
165 std::vector<Fetch2ThreadInfo> fetchInfo;
209 std::vector<InputBuffer<ForwardInstData>> &next_stage_input_buffer);
/gem5/src/mem/cache/prefetch/
H A Dsignature_path.hh98 std::vector<PatternStrideEntry> strideEntries;
169 * @param addresses addresses to prefetch will be added to this vector
174 std::vector<AddrPriority> &addresses);
254 * @param addresses the addresses to be prefetched are added to this vector
259 bool is_secure, std::vector<AddrPriority> &addresses);
281 std::vector<AddrPriority> &addresses) override;

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