110810Sbr@bsdpad.com/* 210810Sbr@bsdpad.com * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> 310810Sbr@bsdpad.com * All rights reserved. 410810Sbr@bsdpad.com * 510810Sbr@bsdpad.com * This software was developed by the University of Cambridge Computer 610810Sbr@bsdpad.com * Laboratory as part of the CTSRD Project, with support from the UK Higher 710810Sbr@bsdpad.com * Education Innovation Fund (HEIF). 810810Sbr@bsdpad.com * 910810Sbr@bsdpad.com * Redistribution and use in source and binary forms, with or without 1010810Sbr@bsdpad.com * modification, are permitted provided that the following conditions are 1110810Sbr@bsdpad.com * met: redistributions of source code must retain the above copyright 1210810Sbr@bsdpad.com * notice, this list of conditions and the following disclaimer; 1310810Sbr@bsdpad.com * redistributions in binary form must reproduce the above copyright 1410810Sbr@bsdpad.com * notice, this list of conditions and the following disclaimer in the 1510810Sbr@bsdpad.com * documentation and/or other materials provided with the distribution; 1610810Sbr@bsdpad.com * neither the name of the copyright holders nor the names of its 1710810Sbr@bsdpad.com * contributors may be used to endorse or promote products derived from 1810810Sbr@bsdpad.com * this software without specific prior written permission. 1910810Sbr@bsdpad.com * 2010810Sbr@bsdpad.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2110810Sbr@bsdpad.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2210810Sbr@bsdpad.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2310810Sbr@bsdpad.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2410810Sbr@bsdpad.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2510810Sbr@bsdpad.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2610810Sbr@bsdpad.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2710810Sbr@bsdpad.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2810810Sbr@bsdpad.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2910810Sbr@bsdpad.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3010810Sbr@bsdpad.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3110810Sbr@bsdpad.com */ 3210810Sbr@bsdpad.com 3310810Sbr@bsdpad.com#ifndef __ARCH_ARM_FREEBSD_SYSTEM_HH__ 3410810Sbr@bsdpad.com#define __ARCH_ARM_FREEBSD_SYSTEM_HH__ 3510810Sbr@bsdpad.com 3610810Sbr@bsdpad.com#include <cstdio> 3710810Sbr@bsdpad.com#include <map> 3810810Sbr@bsdpad.com#include <string> 3910810Sbr@bsdpad.com#include <vector> 4010810Sbr@bsdpad.com 4110810Sbr@bsdpad.com#include "arch/arm/system.hh" 4210810Sbr@bsdpad.com#include "base/output.hh" 4310810Sbr@bsdpad.com#include "kern/freebsd/events.hh" 4410810Sbr@bsdpad.com#include "params/FreebsdArmSystem.hh" 4510810Sbr@bsdpad.com#include "sim/core.hh" 4610810Sbr@bsdpad.com 4710810Sbr@bsdpad.comclass FreebsdArmSystem : public GenericArmSystem 4810810Sbr@bsdpad.com{ 4910810Sbr@bsdpad.com public: 5010810Sbr@bsdpad.com /** Boilerplate params code */ 5110810Sbr@bsdpad.com typedef FreebsdArmSystemParams Params; 5210810Sbr@bsdpad.com const Params * 5310810Sbr@bsdpad.com params() const 5410810Sbr@bsdpad.com { 5510810Sbr@bsdpad.com return dynamic_cast<const Params *>(_params); 5610810Sbr@bsdpad.com } 5710810Sbr@bsdpad.com 5810810Sbr@bsdpad.com /** When enabled, dump stats/task info on context switches for 5910810Sbr@bsdpad.com * Streamline and per-thread cache occupancy studies, etc. */ 6010810Sbr@bsdpad.com bool enableContextSwitchStatsDump; 6110810Sbr@bsdpad.com 6210810Sbr@bsdpad.com /** This map stores a mapping of OS process IDs to internal Task IDs. The 6310810Sbr@bsdpad.com * mapping is done because the stats system doesn't tend to like vectors 6410810Sbr@bsdpad.com * that are much greater than 1000 items and the entire process space is 6510810Sbr@bsdpad.com * 65K. */ 6610810Sbr@bsdpad.com std::map<uint32_t, uint32_t> taskMap; 6710810Sbr@bsdpad.com 6810810Sbr@bsdpad.com /** This is a file that is placed in the run directory that prints out 6910810Sbr@bsdpad.com * mappings between taskIds and OS process IDs */ 7010810Sbr@bsdpad.com std::ostream* taskFile; 7110810Sbr@bsdpad.com 7210810Sbr@bsdpad.com FreebsdArmSystem(Params *p); 7310810Sbr@bsdpad.com ~FreebsdArmSystem(); 7410810Sbr@bsdpad.com 7510810Sbr@bsdpad.com void initState(); 7610810Sbr@bsdpad.com 7710810Sbr@bsdpad.com void startup(); 7810810Sbr@bsdpad.com 7910810Sbr@bsdpad.com /** This function creates a new task Id for the given pid. 8010810Sbr@bsdpad.com * @param tc thread context that is currentyl executing */ 8110810Sbr@bsdpad.com void mapPid(ThreadContext* tc, uint32_t pid); 8210810Sbr@bsdpad.com 8310810Sbr@bsdpad.com private: 8410810Sbr@bsdpad.com /** Event to halt the simulator if the kernel calls panic() */ 8510810Sbr@bsdpad.com PCEvent *kernelPanicEvent; 8610810Sbr@bsdpad.com 8710810Sbr@bsdpad.com /** Event to halt the simulator if the kernel calls oopses */ 8810810Sbr@bsdpad.com PCEvent *kernelOopsEvent; 8910810Sbr@bsdpad.com 9010810Sbr@bsdpad.com /** 9110810Sbr@bsdpad.com * PC based event to skip udelay(<time>) calls and quiesce the 9210810Sbr@bsdpad.com * processor for the appropriate amount of time. This is not functionally 9310810Sbr@bsdpad.com * required but does speed up simulation. 9410810Sbr@bsdpad.com */ 9510810Sbr@bsdpad.com FreeBSD::UDelayEvent *uDelaySkipEvent; 9610810Sbr@bsdpad.com 9710810Sbr@bsdpad.com /** Another PC based skip event for const_udelay(). Similar to the udelay 9810810Sbr@bsdpad.com * skip, but this function precomputes the first multiply that is done 9910810Sbr@bsdpad.com * in the generic case since the parameter is known at compile time. 10010810Sbr@bsdpad.com * Thus we need to do some division to get back to us. 10110810Sbr@bsdpad.com */ 10210810Sbr@bsdpad.com FreeBSD::UDelayEvent *constUDelaySkipEvent; 10310810Sbr@bsdpad.com 10410810Sbr@bsdpad.com /** These variables store addresses of important data structures 10510810Sbr@bsdpad.com * that are normaly kept coherent at boot with cache mainetence operations. 10610810Sbr@bsdpad.com * Since these operations aren't supported in gem5, we keep them coherent 10710810Sbr@bsdpad.com * by making them uncacheable until all processors in the system boot. 10810810Sbr@bsdpad.com */ 10910810Sbr@bsdpad.com Addr secDataPtrAddr; 11010810Sbr@bsdpad.com Addr secDataAddr; 11110810Sbr@bsdpad.com Addr penReleaseAddr; 11210810Sbr@bsdpad.com Addr pen64ReleaseAddr; 11310810Sbr@bsdpad.com Addr bootReleaseAddr; 11410810Sbr@bsdpad.com}; 11510810Sbr@bsdpad.com 11610810Sbr@bsdpad.com#endif // __ARCH_ARM_FREEBSD_SYSTEM_HH__ 11710810Sbr@bsdpad.com 118