Searched refs:val (Results 251 - 275 of 315) sorted by relevance

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/gem5/ext/mcpat/cacti/
H A DUcache.cc58 void min_values_t::update_min_values(const min_values_t * val) { argument
59 min_delay = (min_delay > val->min_delay) ? val->min_delay : min_delay;
60 min_dyn = (min_dyn > val->min_dyn) ? val->min_dyn : min_dyn;
61 min_leakage = (min_leakage > val->min_leakage) ? val->min_leakage : min_leakage;
62 min_area = (min_area > val->min_area) ? val->min_area : min_area;
63 min_cyc = (min_cyc > val
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H A Dbasic_circuit.cc60 bool is_pow2(int64_t val) { argument
61 if (val <= 0) {
63 } else if (val == 1) {
66 return (_log2(val) != _log2(val - 1));
/gem5/ext/libfdt/
H A Dfdt_sw.c170 int fdt_property(void *fdt, const char *name, const void *val, int len) argument
188 memcpy(prop->data, val, len);
/gem5/src/base/
H A Dtime.hh66 Time(const Time &val) : _time(val._time) { } argument
H A Dbitunion.test.cc94 setter(uint64_t &storage, uint64_t val) argument
96 Out out = val;
/gem5/util/m5/
H A Dm5.c289 uint64_t val = m5_init_param(key_str[0], key_str[1]); local
290 printf("%"PRIu64, val);
/gem5/src/arch/generic/
H A Dvec_pred_reg.hh136 set_raw(size_t idx, uint8_t val) argument
139 (Packed ? 1 : sizeof(VecElem)), val);
/gem5/src/arch/riscv/linux/
H A Dlinux.hh158 int32_t val[2]; member in struct:RiscvLinux64::__anon83
307 int32_t val[2]; member in struct:RiscvLinux32::__anon86
/gem5/src/cpu/o3/
H A Dcommit.hh318 void pcState(const TheISA::PCState &val, ThreadID tid) argument
319 { pc[tid] = val; }
/gem5/src/python/m5/util/
H A Dconvert.py103 def convert(val):
105 return converter(val)
H A Dsorteddict.py35 def _set_sorted(self, val):
36 self._sorted = val
H A Dcode_formatter.py48 def __setitem__(self, item, val):
49 self.locals[item] = val
/gem5/src/arch/mips/
H A Dprocess.cc209 MipsProcess::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
212 tc->setIntReg(FirstArgumentReg + i, val);
/gem5/src/arch/alpha/
H A Dprocess.cc232 AlphaProcess::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
235 tc->setIntReg(FirstArgumentReg + i, val);
/gem5/src/gpu-compute/
H A Dgpu_tlb.hh92 Tick tickToCycles(Tick val) const { return val / clock;}
H A Dshader.cc315 Shader::ScheduleAdd(uint32_t *val,Tick when,int x) argument
317 sa_val.push_back(val);
/gem5/ext/pybind11/tests/
H A Dtest_callbacks.cpp149 .def("triple", [](CppBoundMethodTest &, int val) { return 3 * val; });
/gem5/src/systemc/utils/
H A Dvcd.cc580 const uint64_t val = value().value(); variable
582 str[i] = ::bits(val, TimeWidth - i - 1) ? '1' : '0';
606 const uint64_t val = variable
609 if (::mask(w) < val) {
614 str[i] = ::bits(val, w - i - 1) ? '1' : '0';
/gem5/src/sim/
H A Dpseudo_inst.cc420 uint64_t val; local
422 val = tc->getCpuPtr()->system->init_param;
424 val = DistIface::rankParam();
426 val = DistIface::sizeParam();
430 return val;
H A Dprocess.hh78 virtual void setSyscallArg(ThreadContext *tc, int i, RegVal val) = 0;
/gem5/src/arch/x86/
H A Dprocess.cc1008 auxv[auxv.size() - 3].val = aux_data_base;
1010 auxv[auxv.size() - 2].val = argv_array_base;
1012 auxv[auxv.size() - 1].val = aux_data_base + numRandomBytes;
1078 X86_64Process::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
1081 return tc->setIntReg(ArgumentReg[i], val);
1111 I386Process::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
1114 return tc->setIntReg(ArgumentReg[i], val);
/gem5/src/arch/arm/kvm/
H A Darmv8_cpu.cc199 const uint64_t val(EXTRACT_FIELD(reg, KVM_REG_ARM_DEMUX_VAL));
201 inform(" CSSIDR[%i]: %s\n", val,
204 inform(" UNKNOWN[%i:%i]: %s\n", id, val,
/gem5/src/base/vnc/
H A Dvncserver.cc313 VncServer::read(T* val) argument
315 return read((uint8_t *)val, sizeof(T));
338 VncServer::write(T* val) argument
340 return write((uint8_t *)val, sizeof(T));
/gem5/util/stats/
H A Dbarchart.py279 f.write(', '.join([ '%f' % val for val in data]) + '\n')
/gem5/src/arch/
H A Dmicro_asm.py230 val = mo.group(0)
231 return val[1]

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