| /gem5/src/arch/arm/insts/ |
| H A D | branch.hh | 61 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
90 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
120 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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| H A D | sve_mem.hh | 71 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
96 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
122 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
148 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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| H A D | misc64.hh | 56 std::string generateDisassembly(
75 std::string generateDisassembly(
94 std::string generateDisassembly(
106 std::string generateDisassembly(
166 std::string generateDisassembly(
184 std::string generateDisassembly(
202 std::string generateDisassembly(
230 std::string generateDisassembly(
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| H A D | mem64.hh | 61 std::string generateDisassembly(
142 std::string generateDisassembly(
158 std::string generateDisassembly(
174 std::string generateDisassembly(
187 std::string generateDisassembly(
200 std::string generateDisassembly(
219 std::string generateDisassembly(
231 std::string generateDisassembly(
246 std::string generateDisassembly(
260 std::string generateDisassembly(
[all...] |
| H A D | pseudo.cc | 103 DecoderFaultInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:DecoderFaultInst
137 FailUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:FailUnimplemented
178 WarnUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:WarnUnimplemented
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| H A D | mem.cc | 81 RfeOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:ArmISA::RfeOp
106 SrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:ArmISA::SrsOp
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| H A D | misc64.cc | 45 ImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:ImmOp64
54 RegRegImmImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:RegRegImmImmOp64
66 RegRegRegImmOp64::generateDisassembly( function in class:RegRegRegImmOp64
81 UnknownOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:UnknownOp64
338 MiscRegImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:MiscRegImmOp64
349 MiscRegRegImmOp64::generateDisassembly( function in class:MiscRegRegImmOp64
361 RegMiscRegImmOp64::generateDisassembly( function in class:RegMiscRegImmOp64
396 MiscRegImplDefined64::generateDisassembly(Addr pc, function in class:MiscRegImplDefined64
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| H A D | pred_inst.hh | 253 std::string generateDisassembly(
274 std::string generateDisassembly(
293 std::string generateDisassembly(
312 std::string generateDisassembly(
330 std::string generateDisassembly(
374 std::string generateDisassembly(
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| /gem5/src/arch/power/insts/ |
| H A D | static_inst.cc | 59 PowerStaticInst::generateDisassembly(Addr pc, function in class:PowerStaticInst
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| H A D | integer.hh | 94 std::string generateDisassembly(
117 std::string generateDisassembly(
138 std::string generateDisassembly(
174 std::string generateDisassembly(
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| H A D | branch.hh | 94 std::string generateDisassembly(
124 std::string generateDisassembly(
203 std::string generateDisassembly(
233 std::string generateDisassembly(
255 std::string generateDisassembly(
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| H A D | static_inst.hh | 64 std::string generateDisassembly(
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| /gem5/src/arch/sparc/insts/ |
| H A D | nop.hh | 65 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
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| H A D | blockmem.cc | 38 BlockMemMicro::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:SparcISA::BlockMemMicro
63 BlockMemImmMicro::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:SparcISA::BlockMemImmMicro
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| H A D | mem.cc | 39 Mem::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:SparcISA::Mem
66 MemImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:SparcISA::MemImm
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| H A D | nop.cc | 59 std::string generateDisassembly(Addr pc,
65 std::string Nop::generateDisassembly(Addr pc, function in class:Nop
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| /gem5/src/cpu/ |
| H A D | static_inst.cc | 61 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
126 cachedDisassembly = new string(generateDisassembly(pc, symtab));
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| /gem5/src/arch/x86/insts/ |
| H A D | macroop.hh | 87 generateDisassembly(Addr pc, const SymbolTable *symtab) const function in class:X86ISA::MacroopBase
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| H A D | microfpop.hh | 49 * Base classes for FpOps which provides a generateDisassembly method.
79 std::string generateDisassembly(Addr pc,
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| H A D | microregop.cc | 81 std::string RegOp::generateDisassembly(Addr pc, function in class:X86ISA::RegOp
95 std::string RegOpImm::generateDisassembly(Addr pc, function in class:X86ISA::RegOpImm
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| H A D | microregop.hh | 48 * Base classes for RegOps which provides a generateDisassembly method.
97 std::string generateDisassembly(Addr pc,
119 std::string generateDisassembly(Addr pc,
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| H A D | micromediaop.hh | 108 std::string generateDisassembly(Addr pc,
129 std::string generateDisassembly(Addr pc,
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| H A D | microldstop.hh | 117 std::string generateDisassembly(Addr pc,
151 std::string generateDisassembly(Addr pc,
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| H A D | microop.hh | 114 std::string generateDisassembly(Addr pc, function in class:X86ISA::X86MicroopBase
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| /gem5/src/arch/hsail/insts/ |
| H A D | branch.hh | 54 void generateDisassembly() override;
114 BrnInstBase<TargetType>::generateDisassembly() function in class:HsailISA::BrnInstBase
169 void generateDisassembly() override;
246 CbrInstBase<TargetType>::generateDisassembly() function in class:HsailISA::CbrInstBase
338 void generateDisassembly() override;
388 BrInstBase<TargetType>::generateDisassembly() function in class:HsailISA::BrInstBase
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